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Pattern Dependence Process Modeling

By:   Joseph Ervin, Director – Semiconductor Process & Integration Engineering

First order process modeling can help tremendously with process setup and integration challenges that occur in a semiconductor fabrication flow, by visualizing process variation problems “virtually” prior to actual fabrication.  In some instances, a deeper level of complexity needs to be added to the process model to capture the effects of variation in the process.  read more…

Semiconductor Process & Integration Engineer – Paris, France

Semiconductor Process & Integration Engineer – Paris, France

Coventor, Inc. (www.coventor.com) is the global market leader in virtual fabrication solutions for semiconductor technologies and design automation solutions for microelectromechanical systems (MEMS). Coventor serves a worldwide customer base of integrated device manufacturers, independent foundries, equipment makers, and R&D organizations that develop semiconductor and MEMS technologies for consumer, automotive, aerospace, industrial, and defense uses. Coventor’s predictive modeling tools and expertise enable its customers to dramatically reduce silicon learning cycles, giving them a time-to-market advantage and reducing technology development costs. The company is headquartered in Cary, NC and has offices in Waltham, MA;  Silicon Valley, CA;  Tokyo, Japan;  Hsinchu,Taiwan and Paris, France.

We are seeking a BS/MS/PhD-level engineer who has experience and expertise in semiconductor process integration and fabrication. You will work with leading semiconductor companies to implement our virtual fabrication solution for their most advanced development programs, including 10nm CMOS technology and beyond! You will collaborate with the Semiconductor Process & Integration team in the Office of the CTO and highly skilled software development team to create integration and modeling solutions for industry-critical manufacturing challenges. Our tight-knit team of creative engineers is critical in leading customers into the methodology of virtual fabrication.

Responsibilities:

This is a hands-on engineering position, requiring proficiency in full flow semiconductor process integration, as well as strong communication and presentation skills.

This position involves technical responsibility for semiconductor customers and R&D partners in Europe. Work is expected to be partly based at customer/partner sites. Travel is expected.

Required Qualifications:

Education: Bachelor’s degree required, Master’s degree preferred, in related fields of Electrical Engineering, Chemical Engineering, Materials Science or Applied Physics.

Experience: Semiconductor Technology and Processing education and experience is required. Relevant employment experience in the semiconductor industry is required.

Skills: Semiconductor Processing and Integration, Semiconductor Device Physics (preferred), Computer-Aided Design (CAD) and Modeling, Python scripting language, Technical Writing, Communication and Presentation.

  • Excellent English communication skills (verbal and written)
  • Must be legally entitled to work in France

Location: Paris – Area. Other locations in Europe can be considered.

Your title, level of responsibility, creative freedom and salary will be commensurate with your education and experience.  If you are interested in this opportunity and you are authorized to work in France, e-mail your cover letter and CV in English to job1849@coventor.com.

Coventor wins “Best of West” Award

logoBy Pete Singer, Editor-in-Chief

On Wednesday, Solid State Technology and SEMI announced the recipient of the 2016 “Best of West” Award — Coventor — for its SEMulator3D. The award recognizes important product and technology developments in the electronics manufacturing supply chain. The Best of West finalists were selected based on their financial impact on the industry, engineering or scientific achievement, and/or societal impact.

read the full article here.

When Galaxies Collide – Synopsys TCAD and Coventor Start to Overlap

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By Bryon Moyer

Astronomy bestows lavish breathless anticipation upon one of the great events of the universe: two galaxies running into (or through) each other. The thing is, it happens breathtakingly slowly – each stately galaxy spinning away, the distance between them slowly evaporating. Watching it is something of a sampling exercise: see where they are; nap for a couple of centuries. Wake, see that, yup, they’re a little closer; nap. Wake again, grab a new beer, and doggonnit if they aren’t just a wee bit closer yet. Basketball it’s not.

Well, we may have something of a similar event in play in EDA-land. Although referring simply to two galaxies isn’t quite fair: one, Synopsys, is perhaps more of a galaxy cluster to Coventor’s galaxy. To set the scene, let’s examine the status quo – the gap between the companies – and then we’ll look at each one to see how that gap is closing. And we’ll hopefully do it in a way that doesn’t involve napping.

read the full article here.

Coventor to Highlight 3D Virtual Fabrication Breakthroughs at 2016 SEMICON West Conference

BOW Finalist

CARY, NC – July 5, 2016 – Coventor®, Inc., the leading supplier of virtual fabrication solutions for semiconductor devices and micro-electromechanical systems (MEMS), today announced it will be exhibiting at the 46th annual SEMICON West conference in San Francisco, CA from July 12 – 14, 2016.   Coventor will showcase SEMulator3D® 6.0 – the latest version of its semiconductor virtual fabrication platform, which has also been named a finalist in the Best of the West awards.   Along with software demonstrations highlighting the newest features of SEMulator3D 6.0 in its booth # 2622, Coventor will showcase how its virtual fabrication environment has been used to help understand and resolve issues in adopting new lithography technologies. read more…

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Are We There Yet? The Road to 7nm is Paved with Predictive Modeling

 By Amelia Dalton

Sometimes the road less traveled is less traveled for a reason. (Jerry Seinfeld)

We know what roads will lead us to the 7nm semiconductor node and frankly, they’re not all that scenic. In this week’s Fry Fry, we tackle the trials and tribulations of this tiny titan with David Freid from Coventor. David and I discuss the biggest challenges we will face at this smallest of the small process geometry, how virtual fabrication and predictive modeling can help solve some of our problems, and why the most important question surrounding this new node isn’t being asked: “Should we even go to 7nm?”

Listen to the podcast here.

Coventor Makes History (Museum)

Art piece with award

Organizers of the 53rd Design Automation Conference (DAC) hosted an art show to highlight the creativity and artistry that goes into much of the work in the electronics industry.  Coventor was honored with the grand prize for our 3D sculpture, which modeled 14nm FinFET Technology.

Here’s the background on how we came to make this piece.  read more…

Brainstorm: Wearables

ProductDesignDevelopment By PD&D Staff, Product Design and Development

In the Product Design & Development Brainstorm, we talk with industry leaders to get their perspective on issues critical to the design engineering marketplace.

In this issue, we ask: What are some of the key technology trends that will shape the evolution of the wearables market?

read the full article here