Software Product Manager, Experimental Design – Waltham, MA
Coventor, Inc. is seeking an experimental design and statistics expert to guide development of a new software product for the semiconductor market. In this role, you will conceptualize and define new experimental design (DOE) and multivariate data analysis capabilities for our modeling platform, enabling massively parallel virtual ‘experiments’ to investigate process variation. You will be supported by our team of highly skilled, collaborative software engineers and application experts.
Our virtual fabrication software models semiconductor fabrication processes, creating highly accurate and predictive 3D models of semiconductor devices. The effects of process variation in advanced semiconductor technologies are difficult to predict. The addition of DOE and analysis capabilities to our modeling platform will provide valuable and novel insight into these phenomena. A basic understanding of semiconductor fabrication technology is important for this position, but expert knowledge is not required.
Coventor offers a comprehensive benefits package, including competitive salaries and health insurance, and is an EEO/AA Employer.
- Collaborate with customers and application engineering to define product needs.
- Build internal consensus on product priorities.
- Guide the software engineering team during product implementation.
- Work with the sales and marketing teams to launch and market new features.
- Educate the applications team on new product features.
- Contribute to product documentation, case studies, technical publications and test suites.
- MS or PhD in any related technical area.
- Outstanding communication and presentation skills.
- Ability to distill and prioritize ideas from diverse sources to create a concise product plan.
- Significant professional experience in design of experiments (DOE) and statistics, particularly analysis of multivariate data.
- Professional experience in a software development organization, preferably in a product management role.
- Basic understanding of semiconductor fabrication process technology.
Desirable Qualifications (any of the following):
- Knowledge of big data analysis techniques.
- Working knowledge of JMP.
- Knowledge of constrained optimization methods and algorithms.
- Understanding of 3D geometry modeling concepts or methods.
- Experience with 3D modeling software.
- Working knowledge of Matlab.
This regular, full-time position is located in Waltham, MA. You must be a current legal resident of the U.S. or have a valid U.S. visa to apply for this position. Please e-mail your cover letter and resume to firstname.lastname@example.org.
Coventor, Inc. (www.coventor.com) is the global market leader in virtual fabrication solutions for semiconductor technologies and design automation solutions for microelectromechanical systems (MEMS). Coventor serves a worldwide customer base of integrated device manufacturers, independent foundries, equipment makers, and R&D organizations that develop semiconductor and MEMS technologies for consumer, automotive, aerospace, industrial, and defense uses. Coventor’s predictive modeling tools and expertise enable its customers to dramatically reduce silicon learning cycles, giving them a time-to-market advantage and reducing technology development costs. The company is headquartered in Cary, NC and has offices in Waltham, MA, Silicon Valley CA, and Paris, France.
By Tom Kevan, Desktop Engineering
It all started with smartphones and airbags. Design engineers began to integrate sensors in growing numbers into such systems to enable smarter performance. These applications mark the prelude to what Alberto Sangiovanni-Vincentelli, a professor at University of California, Berkeley, describes as a “sensory swarm” — a flood of heterogeneous sensors interfacing the cyber and physical worlds. By 2025, experts predict that the swarm could number as many as 7 trillion devices.
One of the first stages in the realization of this sensor-dominated world, the Internet of Things (IoT) requires technologies that can take on smaller form factors and operate on miserly power budgets. In their search to find sensing devices that can meet these requirements, designers have turned to micro-electromechanical systems, or MEMS. Before they can take full advantage of the miniaturization the technology offers and expand its role in the marketplace, engineers must be able to bridge the gaps between the MEMS, analog and digital design worlds. To do this, they will require a new set of tools.
read the full article here
By Jeff Dorsch
The annual SPIE Advanced Lithography symposium in San Jose, Calif., hasn’t offered a clear winner in the next-generation lithography race. It’s becoming clearer, however, that 193i immersion and extreme-ultraviolet lithography will co-exist in the future, while directed self-assembly, nanoimprint lithography, and maybe even electron-beam direct-write technology will fit into the picture, too.
At the same time, plasma deposition and etching processes are assuming a greater interdependence with 193i, especially when it comes to multiple patterning, such as self-aligned double patterning, self-aligned quadruple patterning, and self-aligned octuple patterning (yes, there is such a thing!).
read the full article here
Tagged 193 immersion, ASML Holding, Coventor, Directed Self Assembly, DSA, EUV, GLOBALFOUNDRIES, INTEL, lithography, multiple patterning, nanoimprint, nanoimprint lithography, plasma deposition, SPIE, SST News, TOPPAN PHOTOMASKS, TSMC
By Luke Collins, Tech Design Forum
Directed self assembly (DSA) techniques may offer similar advantages in terms of process variation control as EUV lithography, according to a study carried out using 3D behavioral process modeling techniques.
This could reduce fab cycle times, ease process integration and save costs in advanced semiconductor processes, especially for DRAMs, whose regular structures are well-suited to the use of DSA.
read the full article here
Leveraging MEMS prototyping platforms for research and commercialization
Coventor is pleased to announce a webinar offered by CMC Microsystems, a provider of Coventor’s MEMS Design solutions.
CMC Microsystems, recognized worldwide for research excellence and for advancing innovations in micro and nano technologies, is pleased to offer a free webinar on MEMS research and commercialization. The webinar, entitled “Leveraging MEMS prototyping platforms for research and commercialization”, will be offered on Tuesday, Feb. 23, 2016 at 9:00 a.m. EST and at 2:00 p.m. EST.
REGISTER NOW: http://www.cmc.ca/en/NewsAndEvents/Webinars/MEMSWebinar.aspx) to learn how MEMS multi-project wafer services can help you bring your MEMS product to market
The speakers will review the development of a wide array of MEMS devices using the MEMS Integrated Design for Inertial Sensors (MIDIS) fabrication process introduced by Teledyne DALSA Semiconductor Inc., along with a discussion regarding micro-electrostatic actuators fabricated using the Micralyne MicraGEM-Si™ MEMS Fabrication Process.
Please join CMC Microsystems to learn how two leading Canadian organizations have leveraged MEMS multi-project wafer services to move their novel concepts towards commercial readiness.
Sponsor: CMC Microsystems
Event: Webinar – “Leveraging MEMS prototyping platforms for research and commercialization”
Date: Tuesday, Feb. 23, 2016 at 9:00 a.m. EST and 2:00 p.m. EST
REGISTER FOR WEBINAR AT: http://www.cmc.ca/en/NewsAndEvents/Webinars/MEMSWebinar.aspx
CARY, NC– February 8, 2016 – Coventor®, Inc., the leading supplier of virtual fabrication solutions for semiconductor devices and micro-electromechanical systems (MEMS), today announced it will be exhibiting at the SPIE Advanced Lithography Conference in San Jose, CA from February 21 – 25, 2016. Coventor will highlight how its SEMulator3D virtual fabrication environment has been used to help understand and resolve issues in adopting new lithography technologies in its booth (#227) and in a series of technical papers. read more…
Click on image to view animation of modeling
By: Jimmy Gu, Coventor Technical Staff
One of the top and probably toughest challenges that process integrators are facing today in a silicon fab is process variability. As a former process integrator working hard to ramp up the yield of 22nm FinFET technology, I saw it first-hand. Looking back, I wish I was equipped with the SEMulator3D virtual fabrication platform, which is designed to address this type of process variability challenge. With the recent release of SEMulator3D 5.1, its process variability toolbox has just received a powerful new addition: the ability to model line edge roughness (LER) and line width roughness (LWR) in lithography. read more…