2014 International Conference on Simulation of Semiconductor Processes and Devices
September 9 – 11, 2014
Co-sponsored by The Japan Society of Applied Physics
Technical co-sponsored by The IEEE Electron Devices Society
This conference provides an opportunity for the presentation and discussion of the latest advances in modeling and simulation of semiconductor devices, processes, and equipment for integrated circuits.
MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme – frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulation.
Coventor will present details of its virtual fabrication modeling solution, SEMulator3D, an innovative platform for significantly reducing the time and cost involved in developing next generation semiconductor and MEMS manufacturing processes.
SEMICON Europa 2014, October 7-9, 2014, in Grenoble France
EMICON Europa to rotate between Dresden and Grenoble
Co-located with Plastic Electronics 2014
Date: 7-9 Oct 2014
Location: Grenoble, France
2014 IEEE International Electron Devices Meeting
Hilton San Francisco Union Square
333 O’Farrell Street
San Francisco, CA USA
December 15-17, 2014
The Annual Technical Meeting of the Electron Devices Society
SPIE Advanced Lithography, February 22-26, 2015, in San Jose, CA.
San Jose Marriott and San Jose Convention Center
San Jose, California, United States
22 – 26 February 2015
SPIE is a highly regarded exhibition for the industry’s top semiconductor suppliers, integrators, and manufacturers. 61 exhibiting companies in 2014.