Press Coverage

China: Fab Boom Or Bust?

By Mark LaPedus

China’s semiconductor industry continues to expand at a frenetic pace. At present there are nearly two dozen new fab projects in China.

Whether all these fab projects get off the ground is not entirely clear because the dynamics in China remain fluid. What is clear is the motivation behind this building frenzy—China is trying to reduce its huge trade imbalance in ICs. The country continues to import a large percentage of its chips from foreign vendors.

The Chinese government wants to produce more chips within China, and it also wants to keep closer tabs on those ICs for security reasons. As part of the plan, China has lured several multinational chipmakers to build new fabs inside its borders. For multinational chipmakers, the attraction is the ability to get closer to an enormous customer base. GlobalFoundries, Intel, Samsung, SK Hynix, TSMC and UMC all are building new fabs or expanding their existing plants in China.

read the full article here.

MEMS: Improving Cost And Yield

By Ed Sperling

MEMS devices inspire awe on the design side. On the test and manufacturing side, they evoke a different kind of reaction.

These are, after all, the intersection of mechanical and electrical engineering—a joining of two miniature worlds that are the basis of some of the most complex technology on the planet. But getting these devices to yield sufficiently, understanding what does or does not work, and figuring out how to do this with the kind of economies of scale that have made semiconductors affordable present some monumental challenges in the MEMS world.

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Coventor’s CTO, David Freid, was featured in the Global Innovation S2Ep1 IEDM2016

By Chris Graham

Global Innovation Host Chris Graham highlights executive interviews at the 2016 International Electron Device Meeting held in San Francisco. The interviews by on-site correspondent Pallab Chatterjee are from the CEO of Leti Technology Research Institute and their Director of Microelectronics. Also featured was the CTO of virtual semiconductor fabrication software provider Coventor.

MEMS: A Tale Of Two Tough Markets

By Ed Sperling

The MEMS market is growing rapidly, profits not so much.

In most market segments, this would be a signal that more automation and standardization are required. But in the microelectromechanical systems world, fixes aren’t so simple. And even where something can be automated, that automation doesn’t work all the time. In fact, while MEMS devices are extremely difficult to design, build and manufacture, the business side of the market is arguably even tougher to manage.

MEMS devices are created through a combination of electrical and mechanical engineering. Included in this category are inertial sensors, such as gyroscopes and accelerometers, both of which are present in almost every mobile device to detect motion. The combination of MEMS devices is how Google’s Waze, a popular peer-to-peer GPS application, can tell if you’re stuck in traffic or moving, how fast you’re moving, and when you’re likely to arrive at your destination given current traffic conditions. There also are compasses, vibration sensors, as well as capacitive touch sensors for security.

read the full article here.

Battling Fab Cycle Times

By Mark LaPedus

The shift from planar devices to finFETs enables chipmakers to scale their processes and devices from 16nm/14nm and beyond, but the industry faces several challenges at each node.

Cost and technical issues are the obvious challenges. In addition, cycle time—a key but less publicized part of the chip-scaling equation—also is increasing at every turn, creating more angst for chipmakers and customers alike. In fact, cost, technical hurdles and cycle time are all contributing to the ongoing slowdown of Moore’s Law.

Cycle time is the amount of time it takes to process a wafer lot in a fab from start to finish. Typically, a wafer lot consists of 25 wafers, which move through various process steps in a fab. An advanced logic process could have from 600 to 1,000 steps or more.

A simple way to look at cycle time is to apply a probability theory called Little’s Law in the fab. In this case, cycle time equals work-in-process (WIP) over the start rate, according to KLA-Tencor. For example, if a fab has 12,000 lots, and it processes 4,000 lots per month, the total cycle time is 3 months, according to KLA-Tencor.

read the full article here.

Coventor and Imec link on virtual fabrication

By Dave Manners

Coventor, the supplier of virtual fabrication technology for ICs and MEMS, has worked with a team from Imec to compare the effects of variability on different semiconductor fabrication processes.

Coventor and its customers use virtual fabrication to deepen the understanding of what’s required to incorporate new lithography technologies.

Coventor has conducted a series of studies aimed at understanding semiconductor lithography and manufacturing issues that could affect yield and device density at future technology nodes (N7 and lower).

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New Embedded Memories Ahead

By Mark Lapedus

The embedded memory market is beginning to heat up, fueled by a new wave of microcontrollers (MCUs) and related chips that will likely require new and more capable nonvolatile memory types.

The industry is moving on several different fronts in the embedded memory landscape. On one front, traditional solutions are advancing. On another front, several vendors are positioning the next-generation memory types, such as FRAM, MRAM, ReRAM and even carbon nanotube RAMs, for the embedded market.

read the full article here.

Transferring Skills Getting Harder

By Ed Sperling

Rising complexity in developing chips at advanced nodes, and an almost perpetual barrage of new engineering challenges at each new node, are making it more difficult for everyone involved to maintain consistent skill levels across a growing number of interrelated technologies.

The result is that engineers are being forced to specialize, but when they work with other engineers with different specialties they frequently don’t understand where the gaps are. Not everyone is speaking the same language—sometimes literally—and the skills at one process node may be markedly different from another. That allows errors to creep in at every level, increasing the number of re-spins and overall costs, decreasing yield, and stretching out time to market.

read the full article here.