by Paul McLellan
At SEMICON last month, Rohit Pal of GlobalFoundries gave a presentation on their methodology for reducing process variation. It was titled Cpk Based Variation Reduction: 14nm FinFET Technology.
Capability indices such as Cpk is a commonly used technique to assess the variation maturity of a technology. It looks at a given parameter’s variability and compares it to 6 sigma. The higher the number the better, 1.33 should have the process yielding close to 100% (for that parameter) and 2 is the full 6 sigma. Using Cpk makes it easy to track metrics to assess variation improvement for a technology. They can also be used as a gating item for technology milestone achievement. However, it is not truly an absolute value, it is a function of the specification limits.
by Pawan Fangaria
We all know that Technology Computer Aided Design (TCAD) simulations are essential in developing processes for semiconductor manufacturing. From the very nature of these simulations (involving physical structure and corresponding electrical characteristics of a transistor or device), they are predominantly finite-element based simulations with complex set of equations to be solved which require large computation, thus increasing simulation time exponentially with the size of the device. It was okay for earlier generations of semiconductor technology nodes to rely on transistor or small cell level process and characterization to develop large designs which were then verified through several build-and-test cycles through actual foundries. However, for today’s nanometer technology nodes and large, complex, high-density designs with complex transistor structures like FinFET and others which exhibit excessive variability in manufacturing, it’s clear that the same old methodology will no longer be effective. . Along with the technology, the economics of chip manufacturing and marketing has become equally pressing, needing substantial reduction in P/Q ratio and very high TAT in order take advantage of ever shrinking windows of opportunity.
by Paul McLellan
One of Coventor’s flagship products is SEMulator3D, and at Semicon West they announced a new version, 2014.100.
SEMulator3D is a powerful 3D semiconductor and MEMS process modeling platform. It uses highly efficient physics-driven voxel modeling technology. It models the physical effects of process steps, which is where all the current challenges are.
Combining the two-dimensional design layout with the process description gives it the capability to model the process flows and determine what will be manufactured with that combination of layout and process. The basic idea, as with all modeling, is to enable experiments to be done quickly and efficiently. Since the alternative is to actually build chips and then take measurements, which is millions of dollars of investment and months of delay, the virtual fabrication route is especially attractive. This is especially important in the early stages of process development since it can drastically shorten the whole development and ramp to volume roadmap.
by Pawan Fangaria
Although MEMS devices in various forms are now found in most electronic devices, predominantly in mobile, automotive, aerospace and many other applications, their major revolution, I believe, is yet to happen. We are seeing rapid innovation in MEMS reflected by their improvements in precision, performance, size reduction, and the continuing evolution of new devices with increasing complexities. The micro level fabrication of MEMS will enable unprecedented use of these into newer and newer semiconductor based electronic devices that will revolutionize the so called IoT arena. MEMS will be essential to IoT products’ ability to connect every aspect of our life, things and happenings around us and provide us ultimate knowledge, control, security through a wide range of devices in many form factors and environments.
The NAND flash business is transitioning from the process that has been used for the past 20-odd years (let’s call it “2D”) and the new process that promises to carry the technology through the end of the decade: 3D NAND.
Trouble is: 3D NAND is bearishly tough to manufacture. This is clear from the fact that Samsung announced “Mass Production” of its VNAND rendition of 3D NAND last August, yet these chips are as rare as hen’s teeth in the marketplace today. Other companies haven’t gone so far as to announce production, and have been very conservative in their predictions of when they plan to roll out their own 3D NAND chips. Most plan to sample late this year or in 2015, and to enter production a year or so later.
Coventor tells me that they are the leading supplier of 3D modeling and simulation software for MEMS, virtual fabrication of MEMS, and semiconductors, providing software and expertise to help customers predict the structures and behavior of their designs before they commit to actual fabrication. This video attests to the company’s strengths in that area.
As it stands today, the video is a very simple 2-minute animation with no sound, running through all the steps of the 3D BiCS process without any explanation. At some future point I hope to add annotation and pauses at reasonable times so that it makes more sense to those who don’t have the process memorized. Even without this finessing, it’s a pretty compelling video to watch, and it underscores the sheer complexity of this new process.
by Pawan Fangaria
Published in SemiWiki
Ever since I started talking about Virtual Fabrication I have mostly looked at it from the manufacturers’ perspective, where it has obvious benefits to develop and model new process technology. But what about the fabless design concept and indeed even the semiconductor IP world that has spawned from it as well? It seems that Virtual Fabrication could be very effective to gain confidence in the fabrication of design by a fabless company, before it sees the actual foundry. Just think about this and in the meanwhile let’s briefly reflect on the evolution of fabless design concept.
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by Bryon Moyer
April 16, 2014 at 11:08 AM
Coventor recently released a new version of SEMulator 3D. We’ve looked at this tool before; it’s what they call a virtual fabrication platform – helpful for simulating semiconductor processes.
Featured in this upgrade is an improvement in the modeling of so-called pattern-dependent etch effects. In other words, how an etch proceeds at one spot depends on what’s around it. And looking farther out apparently makes for a more accurate simulation result, so, with this release, they’ve increased the radius that defines the region or neighborhood to be evaluated when assessing what the local layout looks like.
They’ve also sped up their etch simulation in general.
Meanwhile, they’ve more fully productized a couple of existing features. One is a structure search capability. This allows the user to find a specific structure in all of the various models. This can be particularly useful, for example, when you learn about some particular yield-impacting configuration and want to figure out which models it affects.