Press Coverage

When Galaxies Collide – Synopsys TCAD and Coventor Start to Overlap

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By Bryon Moyer

Astronomy bestows lavish breathless anticipation upon one of the great events of the universe: two galaxies running into (or through) each other. The thing is, it happens breathtakingly slowly – each stately galaxy spinning away, the distance between them slowly evaporating. Watching it is something of a sampling exercise: see where they are; nap for a couple of centuries. Wake, see that, yup, they’re a little closer; nap. Wake again, grab a new beer, and doggonnit if they aren’t just a wee bit closer yet. Basketball it’s not.

Well, we may have something of a similar event in play in EDA-land. Although referring simply to two galaxies isn’t quite fair: one, Synopsys, is perhaps more of a galaxy cluster to Coventor’s galaxy. To set the scene, let’s examine the status quo – the gap between the companies – and then we’ll look at each one to see how that gap is closing. And we’ll hopefully do it in a way that doesn’t involve napping.

read the full article here.

Some notable items from SEMICON West – San Francisco

By Jim Harrison

At SEMICON West, industry organization SEMI provided some industry insights with two presentations. SEMI has more than 2,000 member companies in the science and business of electronics manufacturing. The first talk was by Denny McGuirk, President and CEO, who noted the two main happenings in the semiconductor industry: massive industry consolidation and realignment ($100 billion in M&A) and increasing demand for IoT and smart manufacturing.

Then Dan Tracy, senior director, industry research and statistics, took the stage. Dan noted that the growth rate for cell phones is nearing saturation. In 2013, it was about 42%, and the forecast for 2016 is 8%. You don’t want to stop looking at phones, however; SEMI expects sales of 1.5 billion cell phones in 2016. PC sales continued to drop, but not a lot. Sales are forecasted to be 483 million PC, tablet, and cloud computing units in 2016 versus 493 million in 2015.

Semiconductor revenue is forecasted to decline by 2.4% in 2016, after a 0.8% decline last year. Ever-hopeful SEMI predicts a 2% rise in 2017. IC unit sales are up 1.2% from last year, but semiconductor production equipment bookings are down 1.4%. Dan said that 19 new fabs will begin construction in 2016 and 2017; 10 of those are in China.

read the full article here.

Atomic Layer Etch Heats Up

By Ed Sperling

The atomic layer etch (ALE) market is starting to heat up as chipmakers push to 10nm and beyond.

ALE is a promising next-generation etch technology that has been in R&D for the last several years, but until now there has been little or no need to use it. Unlike conventional etch tools, which remove materials on a continuous basis, ALE promises to selectively and precisely remove targeted materials at the atomic scale.

It now is moving from the lab to the fab. Applied Materials, for example, has officially entered the next-generation etch market by rolling out a new tool technology. Applied describes its technology as an “extreme selectivity” etch tool, although the system basically falls in the generic category of ALE.

read the full article here.

Interconnect Challenges Rising

By Mark Lapedus

Chipmakers are ramping up their 14nm finFET processes, with 10nm and 7nm slated to ship possibly later this year or next.

At 10nm and beyond, IC vendors are determined to scale the two main parts of the finFET structure—the transistor and interconnects. Generally, transistor scaling will remain challenging at advanced nodes. And on top of that, the interconnects may continue to fall further behind the curve.

In fact, the interconnect issues began to emerge at 20nm or so, and the problems are becoming worse at each node. Interconnects—the tiny copper wiring schemes in devices—are becoming more compact at each node. This, in turn, is causing a degradation in performance and an increase in the resistance-capacitance (RC) delay in chips.

read the full article here.

Are We There Yet? The Road to 7nm is Paved with Predictive Modeling

 By Amelia Dalton

Sometimes the road less traveled is less traveled for a reason. (Jerry Seinfeld)

We know what roads will lead us to the 7nm semiconductor node and frankly, they’re not all that scenic. In this week’s Fry Fry, we tackle the trials and tribulations of this tiny titan with David Freid from Coventor. David and I discuss the biggest challenges we will face at this smallest of the small process geometry, how virtual fabrication and predictive modeling can help solve some of our problems, and why the most important question surrounding this new node isn’t being asked: “Should we even go to 7nm?”

Listen to the podcast here.

Brainstorm: Wearables

ProductDesignDevelopment By PD&D Staff, Product Design and Development

In the Product Design & Development Brainstorm, we talk with industry leaders to get their perspective on issues critical to the design engineering marketplace.

In this issue, we ask: What are some of the key technology trends that will shape the evolution of the wearables market?

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RC extraction from ‘virtual fab’ models may speed PDK availability

Tech Design Forum Logo By Luke Collins, Tech Design Forum

Coventor has updated its SEMulator3D virtual fabrication tool so it can extract predicted resistance and capacitance values from its models. The analysis tool could be used to speed up the availability of early PDKs for rapidly evolving processes.

SEMulator3D abstracts IC manufacturing steps into behavioural models, so that it can simulate a a whole process in a ‘virtual fab’. Because the process steps are modeled using behavioural abstractions, rather than full physics, it becomes practical to run multiple options to explore how variations in each step will affect overall outcomes.

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DAC: Coventor Adds Electrical Analytics to SEMulator3D Version 6.0

ee-timesBy R. Colin Johnson, EE Times

LAKE WALES, Fla.—What began as a microelectromechanical systems (MEMS) 3-D design tool has transformed into a 3-D semiconductor design tool which has accordingly added Electrical Analytics to the latest version six of Coventor’s SEMulator3D. See Coventor’s SEMulator3D at the Design Automation Conference (DAC 2016, Austin, Texas, June 5-9), booth 321.

Besides chip designers—now its biggest user segment—are systems designers who, the company claims, make up its fastest growing customer segment. System designers are most interested in how process variations impact their product’s yield robustness, according to David Fried, chief technology officer (CTO) of semiconductors for Coventor.

read the full article here