MEMS + IC Integration: automated MEMS layout PCells
Tape-out is the final stage of the design cycle, the point at which the design layout is sent to the fab or foundry. It is also the most stressful time for the organization. Flexible parameterized cells reduce design entry time and design rule violations.
Parameterized cells (Pcells) provide an advanced level of design automation to minimize tedious and repetitive layout tasks. Pcells make it possible to change the size, shape or contents of each cell instance, without changing the original cell. They also raise the level of abstraction to the component level, which accelerates layout tasks and reduces design violations by simplifying complex shapes and devices that can then be generated, edited and managed with variable settings.
MEMS+ for Cadence drastically eases the pain of tedious manual Pcell creation. Thanks to the easy-to-use MEMS+ import GUI in the Cadence Library manger, Pcells can be created automatically from any given Innovator schematic.
Description of MEMS+ PCells
Coventor has developed a proprietary algorithm to generate parameterized layout cells from 3-D MEMS+ designs. These MEMS+ PCells can be instantiated with different values of the parameters with the following benefits:
- Reduce layout drawing time
- Simplify scripting
- Avoid errors in the MEMS design
- Avoid errors in connectivity of the MEMS layout to other circuit elements
- Enable design reuse
- Improve design productivity
Features of MEMS+ PCells
- Polygons of the MEMS design will be generated when the design is inside the Virtuoso layout environment
- Boolean operations will be done using solid modeling technology, instead of polygons, giving much better accuracy
- The MEMS layout will be available as a fully parameterized cell inside Virtuoso (Pcells), making it faster to check for errors and make changes