Physical process simulation

Brian Bailey
EE TIMES
5/28/2013 7:34 PM EDT

One of things I have learned is that you cannot understand everything associated with designing and making of semiconductors. The physics associated with the manufacturing process, while highly interesting, involves a lot more material science than I care to learn. But for others this is the core of their business and I learned a lot more about it when I spoke to David Fried, the CTO of Coventor.

Now, while I cannot understand many of the details behind their product, the rational for it is blazingly clear. Let me start in the land of functional verification. We do simulation for a number of reasons. The first is that it is too expensive to try something out in silicon before you have a reasonable confidence that it will work. The second is that once you have created the device, you have limited visibility into what is going on inside the chip. So, simulation serves both purposes. First you can ensure that you only go to silicon when you are confident enough that it will work and secondarily, the simulation provides you much more visibility into what is happening so that debug is a lot simpler.

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