By Mark Lapedus
Achieving high yields with acceptable costs is becoming much more difficult as chipmakers migrate to next-generation 3D NAND and finFET devices—but not just because of rising complexity or lithography issues.
To fabricate an advanced logic chip, for example, a wafer moves from one piece of equipment to another in what amounts to 1,000 process steps or more in a fab. Any glitch with the equipment or a process step can cause defects, thereby impacting yield. The culprit may be a malfunction in seemingly insignificant parts or sub-systems in the equipment itself.