Back End of Line (BEOL) Technology Integration

Interconnect requirements for the 22nm technology node and beyond, driven by shrinking FEOL geometry, push the limits of unit process tools for BEOL as well as FEOL. Lengthy and costly in-fab experiments are required to ensure that the integrated BEOL process meets local performance and cross-wafer uniformity requirements. A module-level approach can be used to compensate for local and cross-wafer process variations of each unit process by making adjustments elsewhere in the process flow, but such a strategy requires an excessive amount of test wafer analysis to characterize the process interactions. Virtual fabrication experiments conducted with SEMulator3D can make such a strategy feasible. A hypothetical M2-V1-M1 module fabricated with a Trench First Metal Hard Mask with Self-Aligned Vias (TFMHM-SAV) integration approach is used to demonstrate critical interactions between TiN hard mask etch rate and liner deposition conformality.

Baseline Process Flow for THMHM-SAV

Figures 1 and 2 show the layout and 3D baseline model, respectively, of the nominal process flow. Figure 3 shows how the single damascene M1 layer is patterned using a tri-layer mask, and Figure 4 shows how the dual damascene M2-V1 layer is patterned using TFMHM-SAV with Litho-Etch-Litho-Etch (LELE) double-patterning.

Figure 3: M1 baseline process flow after (a) lithography, (b) mask open, (c) BLok open, (d) copper barrier seed (CuBS) and (e) CMP.

Figure 4. M2-V1 baseline process flow after (a) M2-L1 lithography, (b) M2-L2 lithography, (c) V1 partial etch, (d) BLok open and (e) Cu Barrier Seed (CuBS).

After setting up and calibrating the baseline process for the TFMHM-SAV process module, virtual experiments can be used to optimize process parameters for performance, yield, and cross-wafer uniformity.

Metal Hard-Mask Selectivity

Perhaps the biggest challenge in TFMHM BEOL development is optimization of Metal-Hard-Mask etch selectivity, both for profile management and via self-alignment. As can be seen in Figure 4d, the TiN hard mask defines the self-aligned axis (x-direction) V1 via spacing, shown as dimension (a) in Figure 5. The V1 via spacing is typically smaller than M2-M2 line spacing due to the additional TiN hard mask erosion that occurs during the initial V1 partial etch (Figure 4c).

Figure 5. Model showing M2 critical dimensions and measurement sites –
(a) x-direction via spacing and (b) M2 Cu cross-section area.

A virtual experiment was conducted with SEMulator3D to investigate the effects of M2-V1 TiN etch selectivity and etch depth (time) on V1 spacing in the self-aligned axis and M2 Cu cross-section area (see Fig. 5). Four process parameters were varied: the TiN etch selectivity and depth for M2 and V1. With three values for each parameter, the full-factorial experiment required 81 virtual fabrication runs, requiring a total of 1.5 hours computation time on a laptop PC with a four-core CPU. Figures 6, 7 and 8 show the results from this virtual experiment.

Figure 6: M2 TiN Etch Ratio (selectivity) impact on V1 via spacing and M2 Cu cross-section area – Etch ratio of (a) 0.025, (b) 0.05 and (c) 0.10. Top plot shows M2 Cu area at 50nm ME depth target and bottom plot shows x-direction V1 spacing.

Figure 7: V1 TiN Etch Ratio impact V1 via spacing and M2 Cu cross-section area – Etch ratio of (a) 0.01, (b) 0.025 and (c) 0.10. Top plot shows M2 Cu Area at 50nm ME depth target and bottom plot shows x-direction V1 spacing.

Figure 8: Trend of liner thickness for varying M2 TiN etch ratios. Image 1 post liner/seed and image 2 post CMP – Etch ratio of (a) 0.025, (b) 0.05 and (c) 0.10. The trend shows increased liner in c1 due to cap shoulder.

Figure 9: Electrical net view for V1 TiN etch ratio of (a) 0.01 (4 nets) and (b) 0.10 (2 nets).


As can be seen in Figures 6 and 7, the M2 ME Low-k etch depth had the largest impact on the V1 spacing, followed by V1 TiN etch ratio and M2 ME TiN etch ratio. The self-aligned axis V1 via spacing was nearly linear with respect to V1 TiN etch ratio except for M2 ME etch depth and TiN etch ratio, where an accelerating trend can be seen (Figure 7, bottom plot).

One unexpected trend, shown in the Figure 6 top plot, was a decrease in M2 Cu cross-section area for higher TiN etch ratio. Note that this was a minor effect, but statistically significant. To show this trend, the data from the M2 ME depth center-point condition of 50nm is plotted. Even though the M2 trench CD was increasing there was less Cu in the trench after metallization and CMP. The model images in Figure 8, after liner/seed, reveal that the cap layer (above Low-k) shoulder that formed when the TiN eroded increased the local liner thickness. The TiN overhang at lower TiN etch ratio increased the “bread-loafing” effect which reduced the liner thickness, too. The result was a thicker liner at the top of the feature with higher TiN etch ratio, causing the reduction of Cu in the trench. The virtual fabrication environment’s capability to run many experiments without adding significant cost was able to reduce the risks associated with making process assumptions. The results appear in Figure 8. The cross-section views in Figure 8 are instructive in determining the optimal TiN thickness and profile for liner deposition.

The top images in Figure 7 show that the self-aligned-axis, V1 vias short at a V1 TiN etch ratio of 0.1 (Figure 7c). The electrical net viewing capability in SEMulator3D, which colors each individual electrical net differently, was used to visualize the M2-M2 shorting (Figure 9). Figure 9b confirms the shorting behavior for a high value of V1 TiN etch ratio.


A virtual patterning experiment was run on an example M2-V1-M1 BEOL module to identify process parameters with the strongest effect on the fully-integrated structure. Rapid execution of virtual learning cycles using the SEMulator3D platform reduced the need to make process assumptions. The unexpected decrease in Cu cross-section area with increasing TiN etch rate highlights a subtle effect that would have proven time consuming and costly to understand using traditional in-fab experiments. SEMulator3D can easily handle longer process flows than this M2-V1-M1 example and capture the relationships of process variations further apart in the flow. The identification of the most critical process variables and strongest interactions at the module level can be used to optimize cross-wafer uniformity and could potentially enable automatic process control (APC) for more repeatable manufacturing.

For further examples of the predictive value of SEMulator3D for BEOL process integration, request a copy of the white paper Back End of Line (BEOL) Patterning

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