Request White Paper:
Virtual Fabrication with SEMulator3D®
The relentless scaling of semiconductor technology predicted by Moore’s law, from 22 nm to 14nm to 10 nm and beyond, has required technology advances such as the FinFET, TriGate, High-K/Metal-Gate, embedded memory and advanced patterning. These advances have dramatically increased the complexity of integrated process flows. As a consequence, the cost and duration of technology development using traditional trial-and-error experimental methodologies has greatly increased. The use of a virtual development methodology based on Coventor’s SEMulator3D software is helping technology development organizations meet their time-to-market objectives.
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