semiconductor process modeling

Asymmetric variability issues could impact 7nm processes

By Luke Collins, Tech Design Forum

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New variability issues highlighted by a massive process simulation exercise could make it more difficult than expected to achieve the performance advantages of emerging 7nm and 5nm processes.

Nano-electronics research centre imec has worked with Coventor to simulate the process variability of its 7nm BEOL fabrication processes using Coventor’s SEMulator3D virtual fabrication platform. The simulation of a full process window, looking at how multiple parameters of multiple processes interact, would have taken one million wafers to complete using conventional methods.

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Imec, Coventor expand collaboration to optimize 7 nm semiconductor manufacturing processes

• Joint development team leverages SEMulator3D to explore semiconductor process  variation issues at unprecedented levels
• Collaboration team has conducted a massive computer modeling simulation of a million
wafers to explore process variability in 7nm BEOL semiconductor fabrication
• The extending collaboration aims to further advance the availability, yield and cost of
manufacturing processes for the next generation of 7 nm semiconductor products

Leuven, Belgium & Cary, North Carolina, United States – December 7, 2015 – Imec, a
world-leading nanoelectronics research center and Coventor, a leading supplier of semiconductor process development tools, today announced the expansion of a joint development project to explore process variation issues in 7nm semiconductor technology. read more…

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