About Coventor®


Coventor provides highly advanced process modeling and design automation solutions used to invent the next generation of intelligent electronics. We are dedicated to the success of our customers, and solve real-world process development, design and integration problems for the semiconductor and MEMS industries. Coventor is helping to build a connected world of electronic devices that will improve the productivity and quality of life worldwide.

 

Company

Coventor, a Lam Research company, is a market leader in automated solutions for developing semiconductor process technology, as well as micro-electromechanical systems (MEMS). Coventor serves a worldwide customer base of integrated device manufacturers, memory suppliers, fabless design houses, independent foundries, and R&D organizations. Its SEMulator3D modeling and analysis platform is used for fast and accurate ‘virtual fabrication’ of advanced manufacturing processes, allowing engineers to understand manufacturing effects early in the development process and reduce time-consuming and costly silicon learning cycles. Its MEMS design solutions are used to develop MEMS-based products for automotive, aerospace, industrial, defense, and consumer electronics applications, including smart phones, tablets, and gaming systems. Our software and expertise help customers predict the structures and behavior of their designs before they commit to time-consuming and costly actual fabrication.

The company was founded in 1996 and is headquartered in Raleigh, North Carolina. We have development and sales offices in Waltham, Massachusetts; Fremont, California; Paris, France; Korea and Tokyo, Japan.

Management

Dr. David M. Fried

Vice President Computational Products


Dr. David M. Fried, is Vice President Computational Products at Lam Research, where he is responsible for the company’s strategic direction and implementation of virtual process solutions, including the Coventor SEMulator3D virtual fabrication 3D process modeling solution. He leads the execution of technology strategy for technology platforms, partnerships, and external relationships. His expertise touches upon such areas as Silicon-on-Insulator (SOI), FinFETs, memory scaling, strained silicon, and process variability. Fried is a well-respected technologist in the semiconductor industry, with 56 patents to his credit and a notable 14-year career with IBM, where he was involved in successive process generations from 65-nanometer and lower. His most recent position was 22nm Chief Technologist for IBM’s Systems and Technology Group. He has Masters and Doctoral degrees in Electrical Engineering from Cornell University.
The structural complexity of advanced semiconductor technologies has increased dramatically in recent years, driving longer fab-based experimentation to develop these new technologies. Our goal at Coventor is to provide accurate and predictive 3D process models that can replace these silicon learning cycles, and to ultimately help our customers accelerate time to market and lower development costs.

Kenneth B. Greiner

Senior Director, Semiconductor Product Development


Kenneth B. Greiner is Senior Director of Semiconductor Product Development at Lam Research, where he is responsible for research, development and delivery of the SEMulator3D software product line. Ken has driven the evolution and expansion of SEMulator3D over the last 10 years with his vision for a predictive 3D modeling platform enabled by advanced, physics-driven simulation algorithms. A 20 year veteran of the engineering software industry, Ken has broad technical expertise in software engineering, numerical physics, visualization and geometry. Prior to his work on SEMulator3D, Ken held engineering and management positions in Coventor's MEMS and Microfluidics product lines. Ken holds a Master's degree in Aerospace Engineering from the University of Toronto and a Bachelor's degree in Physics from McMaster University.
Novel products are often discovered at the intersections of technical domains. Our diverse team uses their expertise in semiconductor process physics, simulation, software engineering, graphics, statistics and quality assurance to create revolutionary engineering tools for the semiconductor industry.

Dr. Gerold Schröpfer

Director, Europe and MEMS worldwide


Dr. Gerold Schröpfer is Technical Director for Europe and for the MEMS business operations worldwide. For the last ten years, Gerold has been responsible for overseeing our European MEMS and semiconductor business activities, including the management of R&D programs, industrial and academic partnerships, and external business relationships. Dr. Schröpfer has more than 20 years of relevant experience in MEMS and semiconductor design, process development and EDA product development. Prior to his current position, Gerold carried out pioneering work in the design and development of inertial, tire pressure and magnetic sensors at Sensitec and SensoNor (Infineon). Dr. Schröpfer holds a PhD in engineering science from the University of Neuchâtel (Switzerland) and Franche-Comté (France), as well as a degree in physics from the University of Giessen (Germany).
Coventor has become one of the most trusted and innovative suppliers of engineering software in the semiconductor and MEMS industry, and has established close partnerships with world-leading commercial and R&D institutions. We are dedicated to the success of our customers, and are developing best-in-class software technology for tomorrow’s major advances in silicon.

Dr. Joseph Ervin

Director, Semiconductor Process & Integration


Dr. Joseph Ervin is the Director of the Semiconductor Process and Integration group at Lam Research, where he is responsible for managing the support of Coventor’s Virtual Fabrication platform. Previously, he worked for IBM on semiconductor device and integration development at multiple research and foundry locations, including ST Microelectronics, the College of Nanoscale Science and Engineering, and at GlobalFoundries. His current position involves managing customer applications for our next node semiconductor integration challenges, along with development of unique methods for modeling and solving these issues. He holds a Ph.D. in Device Physics from Arizona State University.
Achieving early yield becomes more and more expensive and time consuming at each new semiconductor node, due to increased device complexity and shrinking critical dimensions. Process interactions and process windows are difficult to determine in advance without computerized process modeling. Our goal is to act as an expert, collaborative partner to our customers during this modeling process, to help our customers quickly bring their new technologies to market.
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