Author Archives: Steve Breit
By: Daniel Sieger, Lead Engineer, SEMulator3D Geometry and Michael Hargrove, Semiconductor Process & Integration Engineer
The SEMulator3D software platform has once again been updated and improved with significantly more features, making it the industry leader in semiconductor virtual fabrication. read more…
By Mark Lapedus
Semiconductor Engineering sat down to discuss the foundry business, memory, process technology, lithography and other topics with David Fried, chief technology officer at Coventor, a supplier of predictive modeling tools. What follows are excerpts of that conversation.
SE: Chipmakers are ramping up 16nm/14nm finFETs today, with 10nm and 7nm finFETs just around the corner. What do you see happening at these advanced nodes, particularly at 7nm?
Fried: Most people are predicting evolutionary scaling from 14nm to 10nm to 7nm. It’s doubtful that we will see anything really earth-shattering in these technologies. And so, a lot of the challenges come down to patterning. We are going to see multi-patterning schemes really take hold at more levels. For example, the fins are now based on self-aligned double patterning. People will move into self-aligned quad patterning. The gates are maybe self-aligned double. Now, they will move into self-aligned quad. So, that’s going to be a big expense, because each level is going to have multiple passes and multiple cuts.
By: Stephen Breit, VP of Engineering
I recently gave an invited talk at the IEEE Inertial Sensors symposium that discussed the future of commodity MEMS inertial sensor design and manufacturing. Inertial sensors comprise one of the fastest growing and most successful segments of the MEMS market. read more…
The multi-beam e-beam mask writer business is heating up, as Intel and NuFlare have separately entered the emerging market.
In one surprising move, Intel is in the process of acquiring IMS Nanofabrication, a multi-beam e-beam equipment vendor. And separately, e-beam giant NuFlare recently disclosed its new multi-beam mask writer technology.
As a result of the moves, the Intel/IMS duo and NuFlare will now race each other to bring multi-beam mask writers into the market. Still in the R&D stage, these newfangled tools promise to speed up the write times for next-generation photomasks, although there are still challenges to bring this technology into production.
LAKE WALES Fla.—Simplfying and popularizing microelectromechanical system (MEMS) design is the goal of the MEMS Design Contest announced yesterday (March 16) at the conference titled Data Automation and Test in Europe (DATE 2016, March 15 to 17, Dresden, Germany). More specifically, the contest encourages chip designers to add MEMS blocks to a chip design, using tools designed for the purpose.
Sponsored by Cadence Design Systems, Coventor, X-FAB and Reutlingen University, the contest will feature a special process design kit (PDK) that the winners will use to fabricate their MEMS chip at X-Fab. If interested attend the DATE session Launch of the Worldwide MEMS Design Contest.