Jörg Doblaski of XFAB presented this conceptual view of the state of MEMS design vs. CMOS design
The Smart Systems Integration conference took place in Copenhagen on March 10-12, 2015. We were invited to join a panel discussion with the title “Towards a “Lego block principle” for heterogonous systems design including MEMS and electronics –Choose and put together-fit”. The capital of Denmark felt like the natural place to discuss a “Lego block principle” and so I happily accepted to represent Coventor in the discussion. Several other MEMS and EDA representatives must have felt the same and we ended up with a pretty interesting mix of people from industry and academia, including (from left to right) Prof. Mirco Meiners from the University of Bremen, Anssi Blomqvist from Murata Electronics Oy, myself (and no I’m not sleeping), Ahmed Hussein Osman from Cadence, Prof. Ralf Sommer from the IMMS, and Peter Merz from X-Fab.
The introduction to the panel was given by Tobias Maier from Robert Bosch who emphasized the widely felt frustration about the lack of a standard design methodology for MEMS. The essence of the current MEMS design flow (or lack thereof) was nicely captured in a slide by Jörg Doblaski of XFAB, presented earlier in the conference:
The digital and analog CMOS design flow is well defined and well supported by foundry PDK’s and EDA software tools. CMOS designers work in a well-defined environment of different hierarchies and abstraction levels that are all built around the idea, that all complexity can be boiled down to a network of identical building blocks: transistors and lumped passive devices. In essence, CMOS designers use the same set of building blocks to create ever more complicated networks. Of course, CMOS designers don’t actually care about transistors; technology developers do. EDA tools with PDKs shield designers from such “details” and allow them to focus on functional blocks such as differential pairs, current mirrors, common-source, common-gate and common-drain circuits.
So, why is MEMS different? Why do MEMS, now a multi-billion dollar industry, still seem to defy an approach that has proven so successful for CMOS design? Is there a transistor equivalent in MEMS or can MEMS at least be reduced to a set of standard (Lego like) building blocks? … and this is how our panel discussion got started.
The topic surly didn’t feel all that new. As a matter of fact, I clearly remember having had a similar discussion 15 years ago with my former PhD supervisor Reinhard Neul who, funnily enough, happened to sit on the panel as well. He was actually the guy taking the pictures (the empty chair on the right is his). People familiar with my work will understand that my position on this subject is to say the least somewhat “biased”. Starting with my PhD at Robert Bosch and later as lead developer of Coventor’s Architect® and MEMS+® software for MEMS design, I’ve tried to prove that a wide variety of MEMS designs can built up from a library of basic building blocks. No, there is not a single building block such as a transistor in MEMS. But yes, MEMS devices can be assembled from a set of building blocks such as plates, beams, comb drives, electrodes and anchors!
Have we at Coventor fully convinced the MEMS design community that a library-based MEMS design flow is possible or even desirable? I would love to say: YES!
The truth is, as always, more complicated and our panel discussion was a lively proof of that. As a matter of fact there are MEMS designers who cherish and defend their freedom to draw about any idea which comes to mind in a layout editor without concern for restrictions imposed by a MEMS component library. Of course, at the end, even the biggest libertarian needs to submit to the design rules imposed by the fab or foundry. And here comes an interesting twist, nicely highlighted by the already mentioned presentation and paper by Jörg Doblaski of XFAB. Apparently, foundries hate freehand layouts, almost as much as I do. Jörg’s presentation nicely summarizes the foundry’s difficulties with checking designs rules on “freehand” layouts. It’s exceedingly difficult to set up automated DRC’s which in fact are written for MEMS building blocks such as combs, plates and anchors. Design rules clearly limit the width of comb fingers and suspension beams. Anchors and plate perforations are clearly defined as well. So, if design rules are actually written for MEMS building blocks, should MEMS designers not be encouraged to use a library based design approach in the first place? Many design rules would simply be imposed by a restricted set of building blocks and therefore don’t need to be checked after the design is complete. MEMS designs would, at least to a certain degree, be “correct by construction”. Well, at this point, I guess, I can no longer hide what I think about all this and I made my point in the panel discussion. Not surprisingly I found a strong ally in Peter Merz from X-Fab. Actually there is a history to all this. We (XFAB, Coventor and Ahmed Hussein of Cadence) have “conspired” over recent years to create what Jörg announced to be the world first “MEMS-specific design automation enablement based on process design kits (PDK).” I highly recommend reading Jörg’s paper in the Smart Systems Integration conference proceedings.
Figure 1: A virtual model of a GAA FET showing residual SiGe after the channel release step. Process engineers have to make a trade-off between silicon loss and residual SiGe.(b) Variation in residual SiGe as a function of the channel width and etch lateral ratio. The higher the channel width, the higher the lateral ratio needed to etch away all the SiGe. Channel widths are shown as delta values from the nominal value of 30 nm.