MEMS+ 4.0: Removing the Barrier between MEMS and ASIC designers

By Steve Breit, V.P. Engineering
MEMS sensors never stand on their own – there’s always an accompanying ASIC that conditions the MEMS output or controls the MEMS. We’ve written frequently in past blogs and white papers about the barrier between MEMS and ASIC design teams. For purposes of functional verification, the ASIC designers need a MEMS block on their schematics, with an underlying model that captures the behavior of the MEMS. The problem arises because the MEMS and ASIC design teams use fundamentally different approaches to simulate the functioning of their respective designs. The MEMS designers use finite element analysis tools while the ASIC designers use analog/mixed-signal circuit simulators such as Cadence Spectre. There’s simply no way to include a conventional finite element model in a circuit simulator, and even if there was the simulations would run so slowly that it would have no practical use. To overcome this incompatibility, all MEMS companies that we’ve engaged with rely on handcrafting models of their MEMS devices in a hardware description language like Verilog-A that is compatible with the ASIC team’s circuit simulator. It takes lots of time, specialized knowledge, and skills to handcraft and verify a MEMS device model in Verilog-A. Because of the technical difficulty, handcrafted models are typically overly simplified, omitting important aspects of the MEMS behavior such as cross coupling between mechanical modes and non-linear effects. Moreover, an ongoing effort is needed to keep the handcrafted models in sync with the actual MEMS design, leaving plenty of opportunities for version skew and human error. The end result, undoubtedly, is extra design spins that are costly not only in engineering time, but in longer time to market. The graphic below illustrates this barrier.

We’ve been striving to break down this barrier since we started developing our MEMS+® suite in 2008. MEMS+ finite element models simulate orders-of-magnitude faster than conventional finite element models and they’re compatible with the Cadence Spectre and APS . With our just-announced MEMS+ 4.0 release, we’ve added a second hand-off path between the MEMS and ASIC designers. The MEMS+ 4.0 release adds a new, optional capability to export reduced-order models in Verilog-A format. What do we mean by reduced order? Let’s say a typical MEMS+ gyro model has a couple hundred degrees of freedom (internal variables in a circuit simulator). The reduced-order exported model will have around 10 degrees of freedom! Not only do these exported Verilog-A models simulate really fast, typically 50X to 250X faster than the original MEMS+ model and as fast as over-simplified hand-crafted models, but the Verilog-A implementation makes them compatible with most commercial A/MS simulators.

As is often the case in the world of simulation, there’s a speed-for-accuracy trade-off between using the full MEMS+ models and the reduced-order Verilog-A models. For instance, the full MEMS+ models include all non-linearities and are completely parametric, while the Verilog-A models include a few selected non-linearieties and are not parametric. Nevertheless, our internal testing and testing by customers using the MEMS+ 4.0 beta release has shown excellent agreement between the full models and the reduced-order models under nominal operating conditions. We expect that ASIC designers will use the reduced-order Verilog-A models most of the time for fleshing out and optimizing their designs, but they’ll also use and appreciate the full MEMS+ models for investigating extreme corner cases and diagnosing anomalous behavior. With MEMS+ 4.0, there are now two great paths between the MEMS and ASIC designers.

The early response from our customers to this new capability has been tremendous. An ASIC design manager at one customer who evaluated the MEMS+ 4.0 beta release confirmed the accuracy and speed of the exported Verilog-A model for their commercial gyro design (see the MEMS+ 4.0 press release). I’ve visited a number of our customers in the past month and they’ve all been enthusiastic about trying the new feature. Being a long-time resident of the Boston area, this isn’t quite as exciting as having the Boston Red Sox win the World Series. But for developers of MEMS design software, hearing this level of customer interest is as good as it gets. Happy co-designing!

Drive and sense modes of a dual-axis gyro simulated in MEMS+ (left), reduced-order Verilog-A model with Coriolis and DC bias non-linearities in a circuit schematic (upper right)and transient simulation of drive amplitude and sense output (lower right)

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