MEMS integration means different things to different audiences. To pioneers in the MEMS industry, integration may imply a monolithic fabrication process, in which the MEMS and accompanying CMOS electronics are fabricated on the same die. As suppliers of MEMS design automation software to the MEMS industry, Coventor sees integration more broadly as the work of combining MEMS with CMOS electronics, whether in a monolithic process, as separate die in the same package, or even in separate packages. And integration encompasses packaging effects on the MEMS as well. The electronics are analog/mixed-signal (A/MS) circuits that provide electrical input to the MEMS and perform A/D conversion on its output. Such circuits are designed and simulated at a high level of abstraction with MATLAB and Simulink, and at lower levels of abstraction with EDA software such as the Cadence Virtuoso suite. MEMS designers, therefore, must deliver models of their designs that are compatible with the tools of choice for electronics design. Coventor has been focusing on addressing this integration challenge for a number of years.
Of course, integration can be a matter of perspective: there are even higher levels of MEMS integration if you view things from a system company’s point of view. To put it simply, one supplier’s system is another’s component. Qualcomm, for example, views the integration challenge from a different perspective. At the recent M2M Forum, Len Sheynblat, VP of Technology at Qualcomm, spoke about the challenges of integrating sensors into mobile handsets. Today’s smart phones have as many as 14 sensor types, many of them based on MEMS technology. Sheynblat pointed out there are currently more than 18 sensor vendors offering more than 26 sensor product lines. With no standards for sensor I/O, even across products from the same vendor, the job of selecting and integrating sensors is unnecessarily time consuming. Even the data sheet specs for sensors of the same type are not standardized. The difficulty of sensor selection and integration flies in the face of increasing pressure on handset makers to bring new generations of handsets to market in ever-shorter cycles (now as short as six months). In fact, Sheynblat stated that with prices dropping for the sensors themselves, the integration costs comprise a growing proportion of the end product cost. If sensor integration is challenging for a company with Qualcomm’s technical and financial resources, one can easily imagine that other companies face similar, if not greater challenges.
While standardization is a critical aspect of MEMS integration that Sheynblat touched upon (And I will address that in a future post), it’s also clear that there needs to be a design methodology and environment conducive to MEMS integration.
System architects and ASIC designers who are responsible for designing a MEMS component (microcontroller plus ASIC plus multiple MEMS sensing elements) need to work at multiple levels of abstraction. At the highest level of abstraction, the algorithmic level, they’ll likely use MATLAB and Simulink to simulate the sensor(s) in combination with electronics and even digital signal processing. In order to simulate the whole system (again, a component to a handset maker), they’ll need a schematic symbol and underlying model for each MEMS device. At a lower level, the ASIC designers will use EDA tools like Cadence Virtuoso to create and verify a circuit design. They, too, will need a schematic symbol and underlying model to place in their circuit schematic. The design of the MEMS devices themselves will likely remain in the hands of specialists who we call MEMS designers. Those specialists must hand over models of their MEMS devices that can be simulated in the MATLAB/Simulink and Cadence Virtuoso. Today, the handoff from MEMS designers to system architects and ASIC designers is almost entirely manual. Besides being labor intensive and a source of human errors, the manually generated MEMS models do not capture all of the physical behavior, leaving the possibility of unexpected interactions between the ASIC and the MEMS that can be difficult to diagnose further down the line.
The challenges of integrating ASICs and MEMS are what Coventor set out to address with the introduction of its MEMS+ product line. Today, MEMS+ enables MEMS designers to automatically generate models of their device that run in MATLAB, Simulink, or the Virtuoso environment. We are working toward a platform that provides automatic links to layout and the ASIC verification flow as well. The Coventor MEMS design automation platform has been adopted by a number of leading MEMS companies. As demand for MEMS-enabled systems grows, and MEMS component suppliers compete to offer ever more functionality in their components, we anticipate that most MEMS companies will be driven to adopt a MEMS design automation platform. At the MEMS component level and all higher levels of the sensor stack, the spoils will go to the companies that can most efficiently integrate multiple technologies.
Coventor’s vision for a MEMS design automation platform and MEMS Development Kits (MDKs) that complement ASIC design tools and methodology.
Figure 1: A virtual model of a GAA FET showing residual SiGe after the channel release step. Process engineers have to make a trade-off between silicon loss and residual SiGe.(b) Variation in residual SiGe as a function of the channel width and etch lateral ratio. The higher the channel width, the higher the lateral ratio needed to etch away all the SiGe. Channel widths are shown as delta values from the nominal value of 30 nm.