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Coventor In The News
Coventor In the News
Press Coverage
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Making Test Transparent With Better Data
Semiconductor Engineering | By Susan Rambo | September 7, 2021
Data is critical for a variety of processes inside the fab. The challenge is getting enough consistent data from different equipment and then plugging it back into the design, manufacturing, and test flows to quickly improve the process and uncover hard-to-find defective die.
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Angstrom-Level Measurements With AFMs
Semiconductor Engineering | By Mark Lapedus | August 19, 2021
Atomic force microscopy is playing a bigger role as critical dimensions shrink and more chips are assembled in packages; competition is growing.
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MEMS: New Materials, Markets And Packaging
Semiconductor Engineering | By Ed Sperling | July 28, 2021
Semiconductor Engineering sat down to talk about future developments and challenges for microelectromechanical systems (MEMS) with Gerold Schropfer, director of MEMS products and European operations in Lam Research’s Computational Products group, and Michelle Bourke, senior director of strategic marketing for Lam’s Customer Support Business Group. What follows are excerpts of that conversation.
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The Increasingly Uneven Race To 3nm/2nm
Semiconductor Engineering | By Mark Lapedus & Ed Sperling | May 24, 2021
An emphasis on customization, many more packaging options, and rising costs of scaling are changing dynamics across the industry.
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What’s Next In Fab Tool Technologies?
Semiconductor Engineering | By Mark Lapedus | May 12, 2021
Experts at the Table: Semiconductor Engineering sat down to discuss extreme ultraviolet (EUV) lithography and other next-generation fab technologies with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. What follows are excerpts of that conversation.
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Applications, Challenges For Using AI In Fabs
Semiconductor Engineering | By Mark Lapedus | April 14, 2021
Experts at the Table: Semiconductor Engineering sat down to discuss chip scaling, transistors, new architectures, and packaging with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. What follows are excerpts of that conversation.
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AI In Inspection, Metrology, And Test
Semiconductor Engineering | By Susan Rambo & Ed Sperling | April 6, 2021
AI/ML is creeping into multiple processes within the fab and packaging houses, although not necessarily for the purpose it was originally intended. The chip industry is just beginning to learn where AI makes sense and where it doesn’t.
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The Future Of Transistors And IC Architectures
Semiconductor Engineering | By Mark Lapedus | March 18, 2021
Semiconductor Engineering sat down to discuss chip scaling, transistors, new architectures, and packaging with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. What follows are excerpts of that conversation.
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Breaking The 2nm Barrier
Semiconductor Engineering | By Mark Lapedus | February 18, 2021
Chipmakers continue to make advancements with transistor technologies at the latest process nodes, but the interconnects within these structures are struggling to keep pace.
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New Transistor Structures At 3nm/2nm
Semiconductor Engineering | By Mark Lapedus | Jaunuary 25, 2021
Several foundries continue to develop new processes based on next-generation gate-all-around transistors, including more advanced high-mobility versions, but bringing these technologies into production is going to be difficult and expensive.
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Hidden Costs In Faster, Low-Power AI Systems
Semiconductor Engineering | By Mark Lapedus | Jaunuary 20, 2021
Chipmakers are building orders of magnitude better performance and energy efficiency into smart devices, but to achieve those goals they also are making tradeoffs that will have far-reaching, long-lasting, and in some cases unknown impacts.
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