• Skip to main content
  • LOG IN
  • REGISTER
Coventor_New_LogoCoventor_New_LogoCoventor_New_LogoCoventor_New_Logo
  • COMPANY
    • ABOUT
    • CAREERS
    • PRESS RELEASE
    • PRESS COVERAGE
    • EVENTS
  • PRODUCTS
    • SEMulator3D®
      Semiconductor Process Modeling
    • CoventorMP®
      MEMS Design Automation
      • CoventorWare®
      • MEMS+®
  • SOLUTIONS
    • SEMICONDUCTOR SOLUTIONS
    • MEMS SOLUTIONS
  • RESOURCES
    • CASE STUDIES
    • BLOG
    • VIDEOS
  • CONTACT
  • SUPPORT
Contact Us
✕
  • Home
  • Press Releases
  • Coventor to Showcase Lithography Research at SPIE 2016
LOGO-IMEC_black
Imec, Coventor expand collaboration to optimize 7 nm semiconductor manufacturing processes
December 7, 2015
New MEMS Design Contest Encourages Advances in MEMS Technology
March 16, 2016

Coventor to Showcase Lithography Research at SPIE 2016

Published by Coventor at February 8, 2016
Categories
  • Press Releases
Tags
  • Lithography and Patterning
  • SEMulator3D

CARY, NC– February 8, 2016 – Coventor®, Inc., the leading supplier of virtual fabrication solutions for semiconductor devices and micro-electromechanical systems (MEMS), today announced it will be exhibiting at the SPIE Advanced Lithography Conference in San Jose, CA from February 21 – 25, 2016.   Coventor will highlight how its SEMulator3D virtual fabrication environment has been used to help understand and resolve issues in adopting new lithography technologies in its booth (#227) and in a series of technical papers.

Moving to EUV or alternate lithography technology is important for the industry, because it will enable chips to become smaller, faster and more functional. Coventor’s contribution to this effort is in simulating new lithography processes to predict problems and provide insight into the potential implementation of these lithography technologies in high volume semiconductor manufacturing, without the time and expense of actual wafer fabrication. As it continues to get more difficult and more costly to move to smaller nodes, virtual fabrication is becoming a more critical tool for chipmakers.

Coventor and its customers have been using virtual fabrication to deepen the understanding of what’s required to incorporate new lithography technologies.   Coventor will present two papers related to this topic at SPIE 2016:

Predicting LER and LWR in SAQP with 3D virtual fabrication  (Interactive Poster Session)

  • Tuesday, 23 February 2016, 6:00 PM – 8:00 PM
  • Author(s): Jiangjiang Gu, Dalong Zhao, Vasanth Allampalli, Daniel Faken, Ken Greiner, David M. Fried, Coventor, Inc. (United States)
  • This paper demonstrates how to improve fabrication yield by reducing LER and LWR using process flows and integration techniques discovered via virtual fabrication.

Virtual fabrication using directed self-assembly for process optimization in a 14nm DRAM node  (Session 8:  DSA Modeling and Design)

  • Wednesday, 24 February 2016, 1:40 PM – 3:30 PM
  • Author(s): Mattan Kamon, Mustafa Akbulut, Yiguang Yan, Daniel Faken, Andras Pap, Vasanth Allampalli, Ken Greiner, David M. Fried, Coventor, Inc. (United States)
  • This paper describes using virtual fabrication to analyze the incorporation of advanced DSA (directed self-assembly) lithography processes in DRAM development.   This may be the first paper using virtual fabrication to look at the benefits of DSA processes vs. SAQP (self-aligned quadruple patterning).

The latest version of Coventor’s SEMulator3D Virtual Fabrication Platform enables process modeling for FinFETs, 3D NAND Flash, BEOL, Nanowires, 3D-IC, FDSOI, DRAM, and other next generation processes. In addition it includes modeling performance enhancements, a new GUI for the process editor and adaptive incremental rebuild capabilities.

About Coventor

Coventor, Inc. is the market leader in automated design solutions for developing semiconductor process technology, as well as micro-electromechanical systems (MEMS). Coventor serves a worldwide customer base of integrated device manufacturers, memory suppliers, fabless design houses, independent foundries, and R&D organizations. Its SEMulator3D modeling and analysis platform is used for fast and accurate ‘virtual fabrication’ of advanced manufacturing processes, allowing engineers to understand manufacturing effects early in the development process and reduce time-consuming and costly silicon learning cycles. Its MEMS design solutions are used to develop MEMS-based products for automotive, aerospace, industrial, defense, and consumer electronics applications, including smart phones, tablets, and gaming systems. The company is headquartered in Cary, North Carolina and has offices in California’s Silicon Valley, Waltham, Massachusetts, and Paris, France. More information is available at https://www.coventor.com.

—end—

Coventor and SEMulator3D are registered trademarks of Coventor, Inc. All other trademarks are the property of their respective owners.

Note to Editors: Digital images are available.

Share
Coventor
Coventor

Related posts

CMC-Coventor-Combined-Logos
November 17, 2020

Coventor and CMC Microsystems expand collaboration to further enable innovation in semiconductor and microsystem technology development


Read more - Coventor and CMC Microsystems expand collaboration to further enable innovation in semiconductor and microsystem technology development
powerful new device construction and modeling capabilities accelerate MEMS technology development

New in CoventorMP 1.3, powerful new device construction and modeling capabilities accelerate MEMS technology development

July 17, 2020

Coventor Delivers a Breakthrough in Advanced MEMS Design Capabilities


Read more - Coventor Delivers a Breakthrough in Advanced MEMS Design Capabilities
New in SEMulator3D 8.0, powerful new process simulation and analytics capabilities accelerate semiconductor technology development and Design-Technology Co-Optimization (DTCO).

New in SEMulator3D 8.0, powerful new process simulation and analytics capabilities accelerate semiconductor technology development and Design-Technology Co-Optimization (DTCO).

July 8, 2019

Coventor Adds Process Optimization Features to SEMulator3D 8.0


Read more - Coventor Adds Process Optimization Features to SEMulator3D 8.0
May 9, 2018

GLOBAL MEMS DESIGN CONTEST WINNERS ANNOUNCED


Read more - GLOBAL MEMS DESIGN CONTEST WINNERS ANNOUNCED

Comments are closed.

Product Information

  • Product Offerings
  • Technical Support & Training
  • Licensing
  • System Requirements

Resources

  • Blog
  • Case Studies
  • Videos
  • 2018 MEMS Design Contest

Company

  • About
  • Press
  • Partners & Programs
  • Contact
© Copyright Coventor Inc., A Lam Research Company, All Rights Reserved
Privacy Policy • Terms of Use
Contact Us
  • LOG IN
  • REGISTER