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Coventor’s Technology Roundtable at IEDM 2016

Published by Coventor at December 2, 2016
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Coventor Spearheads Discussion on Navigating Future Semiconductor Yield, Reliability and Cost Challenges

CARY, NC– December 6, 2016 – Coventor®, Inc., the leading supplier of automated software solutions for semiconductor devices and micro-electromechanical systems (MEMS), is sponsoring an advanced semiconductor technology panel on Tuesday, December 6 in San Francisco, California at the 2016 IEDM Conference. The panel is entitled “BEOL Barricades: Navigating Future Semiconductor Yield, Reliability and Cost Challenges”.

The panel discussion will explore major questions in advanced semiconductor development, including:

  1. When will current patterning, metallization and other processes fail to scale to the next node?
  2. If we continue to scale interconnect dimensions, will we create yield, reliability, cost or manufacturing challenges that prove insurmountable?
  3. Are there fundamental limits to interconnect processes?
  4. How much longer can we continue to use current interconnect processes and technologies?

A distinguished panel of semiconductor experts will discuss these questions, and describe how they are innovating around these barriers and advancing BEOL and interconnect technology. The distinguished panelists will include:

  • Paul Besser, Ph.D., Senior Technology Director, Lam Research Corporation
  • Craig Child, Ph.D., Deputy Director Advanced Technology Development, GlobalFoundries, Inc.
  • Anton deVilliers, Ph.D., R&D Director, Lithography Patterning SMTS, Tokyo Electron LTD.
  • David Fried, Ph.D., Chief Technology Officer Semiconductor, Coventor, Inc.
  • Chih-Chien Liu, Ph.D., Deputy Division Director, ATD Module Division of UMC, Inc.
  • Kelvin Low, Sr. Director, Foundry Marketing & Business Development, Samsung Semiconductor

The panel will be moderated by Ed Sperling, Editor in Chief, Semiconductor Engineering

The event will be held on Tuesday, December 6 from 5:00 p.m. – 8:00 p.m. on the 4th floor of the Hilton San Francisco Union Square.

REGISTER AT:  https://www.coventor.com/register-for-complimentary-reception-and-panel-discussion

About Coventor

Coventor, Inc. is the market leader in automated design solutions for developing semiconductor process technology, as well as micro-electromechanical systems (MEMS). Coventor serves a worldwide customer base of integrated device manufacturers, memory suppliers, fabless design houses, independent foundries, and R&D organizations. Its SEMulator3D modeling and analysis platform is used for fast and accurate ‘virtual fabrication’ of advanced manufacturing processes, allowing engineers to understand manufacturing effects early in the development process and reduce time-consuming and costly silicon learning cycles. Its MEMS design solutions are used to develop MEMS-based products for automotive, aerospace, industrial, defense, and consumer electronics applications, including smart phones, tablets, and gaming systems. The company is headquartered in Cary, North Carolina and has offices in California’s Silicon Valley; Waltham, Massachusetts; and Paris, France. More information is available at https://www.coventor.com.

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