Semiconductor Solutions: Memory
Advanced memory technologies have required the use of increasingly complex device structures and manufacturing techniques. For instance, NAND memory density has scaled by increasing the number of layers in the vertical NAND memory stack. This increase in stack height has required the use of high aspect ratio etch manufacturing, and imposed tradeoffs between staircase height, memory density, foot print scaling and other factors. Unique integration and patterning schemes have been employed to solve these scaling challenges, but design rules are difficult to meet while achieving required yield.
SEMulator3D can be used to proactively address these challenges and tradeoffs, by providing a 3D understanding of complex process sequences. Non-intuitive interactions among process steps, and their effect on memory device performance, can be quickly analyzed.