FinFET transistor performance

Coventor Adds Device Analysis Capabilities to SEMulator3D 7.0

New in SEMulator3D 7.0:  Powerful new process and device simulation capabilities


For Immediate Distribution
For more information, contact:
Toni Sottak
(408) 876-4418,

 Coventor Adds Device Analysis Capabilities to SEMulator3D 7.0

New Features Enable SEMulator3D Version 7.0 to Address Both Process Modeling and Device Analysis for Better Insight into Advanced Semiconductor Technology Development

CARY, NC– February 28, 2018 – February 26, 2018 – Coventor, Inc., a Lam Research Company, the leading supplier of design automation solutions for semiconductor devices and micro-electromechanical systems (MEMS), today announced the availability of SEMulator3D® 7.0 – the newest version of its semiconductor virtual fabrication platform. With added features, performance improvements, and a new Device Analysis capability, SEMulator3D 7.0 addresses both process and device simulation while lowering the barriers to advanced semiconductor technology development.  The new Device Analysis capability enables seamless understanding of how process changes, process variability, and integration schemes directly impact transistor device performance.   read more…

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Using Advanced Statistical Analysis to improve FinFET transistor performance

By: Jimmy Gu, SP&I Staff Engineer

Trial and error wafer fabrication is commonly used to study the effect of process changes in the development of FinFET and other advanced semiconductor technologies.  Due to the interaction of upstream unit process parameters (such as deposition conformality, etch anisotropy, selectivity) during actual fabrication, variations based upon process changes can be highly complex. Process simulators that mimic fab unit processes can now be used to model these complex interactions.  They can also help process engineers identify important process and/or design parameters that drive certain critical targets such as CDs, yield limiting spacing, 3D design rule violations, resistance/capacitance, and other process and design issues.   The number of possible parameters that affect device performance and yield can be quite large, so statistical analysis can provide useful insight and help identify critical performance parameters.  Coventor’s SEMulator3D virtual fabrication (or process simulation) platform contains an analytics module for conducting virtual design-of-experiments and statistical analysis. I would like to use an example of a 14nm FinFET process flow in SEMulator3D to identify important process parameters that drive fin top CD, which is a key metric for transistor performance.

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