Introduction In logic devices such as FinFETs (field-effect transistors), metal gate parasitic capacitance can negatively impact electrical performance. One way to reduce this parasitic capacitance is to optimize the metal […]
Profile variation is one of the most important problems during semiconductor device manufacturing and scaling. These variations can degrade both chip yield and device performance. Virtual fabrication can be used […]
Introduction With continuing FinFET device process scaling, micro loading control becomes increasingly important due to its significant impact on yield and device performance [1-2]. Micro-loading occurs when the local etch […]
Static Random-Access Memory (SRAM) has been a key element for logic circuitry since the early age of the semiconductor industry. The SRAM cell usually consists of six transistors connected to […]
While contact gate pitch (GP) and fin pitch (FP) scaling continues to provide higher performance and lower power to FinFET platforms, controlling RC parasitics and achieving higher transistor performance at […]
When they were first commercialized at the 22 nm node, finFETs represented a revolutionary change to the way we build transistors, the tiny switches in the “brains” of a chip. As […]
Process engineers and integrators can use virtual process modeling to test alternative process schemes and architectures without relying on wafer-based testing. One important aspect of building an accurate process model […]
As the need to scale transistors to ever-smaller sizes continues to press on technology designers, the impact of parasitic resistance and capacitance can approach or even outpace other aspects of […]
New Features Enable SEMulator3D Version 7.0 to Address Both Process Modeling and Device Analysis for Better Insight into Advanced Semiconductor Technology Development CARY, NC– February 28, 2018 – February 26, […]
Coventor recently sponsored an expert panel discussion at IEDM 2017 to discuss how we might advance the semiconductor industry into the next generation of technology. The panel discussed alternative methods […]