June 29, 2020
The very first all-electronic memory was the Williams-Kilburn tube, developed in 1947 at Manchester University. It used a cathode ray tube to store bits as dots on the screen’s surface. […]
May 26, 2020
UNDERSTANDING THE BENEFITS AND CHALLENGES OF A NEW, NEXT-GENERATION SEMICONDUCTOR ARCHITECTURE In our November 2019 blog [1], we discussed using virtual fabrication (SEMulator3D®) to benchmark different process integration options for […]
January 29, 2020
Leakage current has been a leading cause of device failure in DRAM design, starting with the 20nm technology node. Problems with leakage current in DRAM design can lead to reliability […]
December 16, 2019
Semiconductor process engineers would love to develop successful process recipes without the guesswork of repeated wafer testing. Unfortunately, developing a successful process can’t be done without some work. This blog […]
July 31, 2019
Driven by Moore’s law, memory and logic semiconductor manufacturers pursue higher transistor density to improve product cost and performance [1]. In NAND Flash technologies, this has led to the market […]
July 8, 2019
New Features Enable SEMulator3D 8.0 to Address Both Process Modeling and Device Analysis for Better Insight into Advanced Semiconductor Technology Development
March 21, 2019
