A digital twin is a digital representation of a real-world item, and includes software objects or models that represents these real-world items. In MEMS product development, digital twins (or software […]
When they were first commercialized at the 22 nm node, finFETs represented a revolutionary change to the way we build transistors, the tiny switches in the “brains” of a chip. As […]
Chip packaging has expanded from its conventional definition of providing protection and I/O for a discrete chip, to encompassing a growing number of schemes for interconnecting multiple types of chips. […]
Lam Research® is one of the top equipment suppliers in the semiconductor ecosystem. As a trusted, collaborative partner to the world’s leading semiconductor companies, Lam Research is a fundamental enabler […]
The IEEE MEMS conference was held in Vancouver during January 2020. We attended the conference to meet with our customers and to see what new developments are being made in […]
Semiconductor process engineers would love to develop successful process recipes without the guesswork of repeated wafer testing. Unfortunately, developing a successful process can’t be done without some work. This blog […]
Driven by Moore’s law, memory and logic semiconductor manufacturers pursue higher transistor density to improve product cost and performance [1]. In NAND Flash technologies, this has led to the market […]
As semiconductor technology scales down in size, process integration complexity and defects are increasing in 3D NAND flash, partially due to larger stack deposits and thickness variability between the wafer […]
3D NAND flash memory has enabled a new generation of non-volatile solid-state storage useful in nearly every electronic device imaginable. 3D NAND can achieve data densities exceeding those of 2D NAND […]
Unlike scaling practices in 2D NAND technology, the direct way to reduce bit costs and increase chip density in 3D NAND is by adding layers. In 2013, Samsung shipped the […]