Senior Applications Support Engineer for MEMS Design Software – Silicon Valley, CA
Do you enjoy plunging into new technical areas, tackling hard-to-solve problems, and teaching and collaborating with engineers? Do you have a strong background in MEMS sensors and actuators with experience in design and simulation? We are seeking a multi-talented engineer to provide pre- and post-sales support for our industry-leading MEMS design automation solutions. You will have the opportunity to work closely with leading MEMS companies and R&D centers on a wide range of MEMS devices. You will join our outstanding sales and support team and collaborate with our development organization to deliver best-in-class MEMS design solutions. Your compensation will be commensurate with your education and experience.
- MS or PhD degree in Electrical Engineering, Mechanical Engineering, or related field with focus on MEMS design, simulation and fabrication
- Experience designing MEMS inertial sensors, MEMS microphones, RF MEMS, optical MEMS, or related MEMS devices
- Experience with finite element analysis (FEA) with commercial software such as CoventorWare, ANSYS, COMSOL, or ABAQUS
- Experience with electronic design automation (EDA) tools such as Cadence Virtuoso, MATLAB and Simulink
- Familiarity with fundamentals of electronics and integrated circuits
- Proficiency with the Windows and/or Linux operating systems
- Team orientation with excellent interpersonal skills
- Excellent English communication skills (verbal and written).
- Professional work experience in MEMS design and analysis
- Thorough understanding of electrostatic actuation and capacitive sensing
- Strong understanding of multi-DOF electromechanical modeling and simulation
- Experience with MATLAB scripting and/or Python scripting
This regular, full-time opening is based in Silicon Valley (Campbell, CA) and will require some travel. You must be a current legal resident of the U.S. or have a valid U.S. visa to apply for this position. Coventor offers comprehensive benefits and is an EEO/AA Employer. Please email your cover letter and resume to email@example.com.
by Sandy Wen, Semiconductor Process and Integration
3D NAND Flash has become a hot topic in non-volatile memory these days. While planar NAND flash is still going strong, it has been increasingly difficult to scale planar technology past the sub-20nm lengths and meet upcoming memory cell density and cost targets. In a different approach, Toshiba published early work on 3D NAND in 2007  in which flash cells are stacked vertically to increase cell density. Since then, all major flash memory manufacturers have jumped aboard this train with their own flash architectures, and in 2013, Samsung became the first to ship “V-NAND” in the form of a solid state drive.
The Thirteenth Annual Workshop on Microelectronics and Electron Devices (WMED 2015). WMED 2015 will provide a forum for reviewing and discussing all aspects of microelectronics including processing, electrical characterization, design, and new device technologies.
Friday, March 20, 2015
Jordan and Simplot Ballrooms
Student Union Building
Boise State University
1910 University Drive
Boise, Idaho 83725
2nd Annual IEEE International Symposium on Inertial Sensors and Systems
Hupuna Beach Prince Hotel, Hawaii, USA
IEEE ISISS 2015 will be a 4 day event with tutorials on Monday, March 23, and the symposium’s technical sessions on March 24-26.
DTIP 2015 – Montpellier – France, 27 – 30 April 2015
DTIP is a symposium including two main Conferences: the CAD, Design and Test Conference devoted to the development of Computer-Aided Design (CAD) tools and design methodologies for MEMS and MOEMS, and the Microfabrication, Integration and Packaging Conference dedicated to the development of integration technologies and packaging for MEMS and MOEMS. Both conferences share common plenary talks including invited talks, panels and special sessions to allow close interaction between both communities.
Among others, the program features presentations from Zeiss, ST, imec, ESIEE, Politechnico di Torino and Thales. A special session on « Co-design for MEMS based Smart Systems » is organized by Gerold Schröpfer from Coventor, France.
by Paul McLellan
The last paradigm shift in DRC was around 0.35um when designs got too large to handle as flat data, and hierarchical approaches were required. Back then the design rules themselves were not that complex, the explosion of data volume came from the complexity of the design itself. But each process node added more design rules intricacies and many new types of rules that needed to be checked.
SPIE Advanced Lithography, February 22-26, 2015, in San Jose, CA.
Coventor will attend SPIE 2015, visit us at booth #205
San Jose Marriott and San Jose Convention Center
San Jose, California, United States
22 – 26 February 2015
SPIE is a highly regarded exhibition for the industry’s top semiconductor suppliers, integrators, and manufacturers. 61 exhibiting companies in 2014.