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The Future of MEMS Sensor Design and Manufacturing

By:  Stephen Breit, VP of Engineering

I recently gave an invited talk at the IEEE Inertial Sensors 2016 symposium that discussed the future of commodity MEMS inertial sensor design and manufacturing. Inertial sensors comprise one of the fastest growing and most successful segments of the MEMS market. read more…

Will directed self-assembly pattern 14nm DRAM?

By: Mattan Kamon, PhD., Distinguished Technologist, R&D, Coventor

Matt's March 2016 Blog Graphic

But first, more generally, will directed self-assembly (DSA) join Extreme Ultraviolet (EUV) Lithography and next generation multi-patterning techniques to pattern the next memory and logic technologies?  Appealing to the wisdom of crowds, the organizers of the 2015 1st International DSA symposium recently surveyed the attendees, and nearly 75% believed DSA would insert into high volume manufacturing within the next 5 years, and nearly 30% predicted insertion within the next 2 years.   What is gating insertion?  The crowd rated defectivity as the most critical issue facing DSA.  This fact adds weight to memory being the first to be patterned with DSA.  This is because, as Roel Gronheid from IMEC pointed out last month at the SPIE Advanced Lithography conference [1], memory chips can tolerate single failing cells through redundancy and so can could tolerate higher defectivity in patterning (roughly 1 defect/cm2 compared to 0.01 defect/cm2 for logic).  Defectivity rates for DSA aren’t there yet (according to public information), but are rapidly approaching [2], [3]. read more…

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Multi-Beam Market Heats Up

se_logoBy Mark Lapedus

The multi-beam e-beam mask writer business is heating up, as Intel and NuFlare have separately entered the emerging market.

In one surprising move, Intel is in the process of acquiring IMS Nanofabrication, a multi-beam e-beam equipment vendor. And separately, e-beam giant NuFlare recently disclosed its new multi-beam mask writer technology.

As a result of the moves, the Intel/IMS duo and NuFlare will now race each other to bring multi-beam mask writers into the market. Still in the R&D stage, these newfangled tools promise to speed up the write times for next-generation photomasks, although there are still challenges to bring this technology into production.

read the full article here

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New MEMS Design Contest Encourages Advances in MEMS Technology

MEMS Design contest company header image

Industry leaders in EDA & foundry services collaborate with academia to explore future possibilities of CMOS/MEMS integration  

Dresden, Germany – March 16, 2016 – Jointly sponsored by Cadence Design Systems, Coventor, X-FAB and Reutlingen University, a new MEMS Design Contest is being launched at DATE 2016.  The objective of this contest is to encourage greater ingenuity with regard to the integration of MEMS devices and mixed-signal CMOS blocks.  To kick off the contest, an informative session will be held in the Exhibition Theatre on Thursday, March 17, 2016 from 14:00 to 17:30 and is open to all DATE attendees free of charge. read more…

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MEMS Grand Challenge Debuts

ee-timesBy R. Colin Johnson, EE Times

LAKE WALES Fla.—Simplfying and popularizing microelectromechanical system (MEMS) design is the goal of the MEMS Design Contest announced yesterday (March 16) at the conference titled Data Automation and Test in Europe (DATE 2016, March 15 to 17, Dresden, Germany). More specifically, the contest encourages chip designers to add MEMS blocks to a chip design, using tools designed for the purpose.

Sponsored by Cadence Design Systems, Coventor, X-FAB and Reutlingen University, the contest will feature a special process design kit (PDK) that the winners will use to fabricate their MEMS chip at X-Fab. If interested attend the DATE session Launch of the Worldwide MEMS Design Contest.

read the full article here

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Software Product Manager, Experimental Design – Waltham, MA

Software Product Manager, Experimental Design – Waltham, MA

Coventor, Inc. is seeking an experimental design and statistics expert to guide development of a new software product for the semiconductor market. In this role, you will conceptualize and define new experimental design (DOE) and multivariate data analysis capabilities for our modeling platform, enabling massively parallel virtual ‘experiments’ to investigate process variation. You will be supported by our team of highly skilled, collaborative software engineers and application experts.

Our virtual fabrication software models semiconductor fabrication processes, creating highly accurate and predictive 3D models of semiconductor devices. The effects of process variation in advanced semiconductor technologies are difficult to predict. The addition of DOE and analysis capabilities to our modeling platform will provide valuable and novel insight into these phenomena. A basic understanding of semiconductor fabrication technology is important for this position, but expert knowledge is not required.

Coventor offers a comprehensive benefits package, including competitive salaries and health insurance, and is an EEO/AA Employer.

Responsibilities include:

  • Collaborate with customers and application engineering to define product needs.
  • Build internal consensus on product priorities.
  • Guide the software engineering team during product implementation.
  • Work with the sales and marketing teams to launch and market new features.
  • Educate the applications team on new product features.
  • Contribute to product documentation, case studies, technical publications and test suites.

Required Qualifications:

  • MS or PhD in any related technical area.
  • Outstanding communication and presentation skills.
  • Ability to distill and prioritize ideas from diverse sources to create a concise product plan.
  • Significant professional experience in design of experiments (DOE) and statistics, particularly analysis of multivariate data.
  • Professional experience in a software development organization, preferably in a product management role.
  • Basic understanding of semiconductor fabrication process technology.

Desirable Qualifications (any of the following):

  • Knowledge of big data analysis techniques.
  • Working knowledge of JMP.
  • Knowledge of constrained optimization methods and algorithms.
  • Understanding of 3D geometry modeling concepts or methods.
  • Experience with 3D modeling software.
  • Working knowledge of Matlab.

This regular, full-time position is located in Waltham, MA. You must be a current legal resident of the U.S. or have a valid U.S. visa to apply for this position. Please e-mail your cover letter and resume to job1844@coventor.com.

About Coventor:

Coventor, Inc. (www.coventor.com) is the global market leader in virtual fabrication solutions for semiconductor technologies and design automation solutions for microelectromechanical systems (MEMS). Coventor serves a worldwide customer base of integrated device manufacturers, independent foundries, equipment makers, and R&D organizations that develop semiconductor and MEMS technologies for consumer, automotive, aerospace, industrial, and defense uses. Coventor’s predictive modeling tools and expertise enable its customers to dramatically reduce silicon learning cycles, giving them a time-to-market advantage and reducing technology development costs. The company is headquartered in Cary, NC and has offices in Waltham, MA, Silicon Valley CA, and Paris, France.

7nm Lithography Choices

se_logoBy Mark Lapedus

Chipmakers are ramping up their 16nm/14nm logic processes, with 10nm expected to move into early production later this year. Barring a major breakthrough in lithography, chipmakers are using today’s 193nm immersion and multiple patterning for both 16/14nm and 10nm.

Now, chipmakers are focusing on the lithography options for 7nm. For this, they hope to use a combination of two technologies at 7nm—extreme ultraviolet (EUV) lithography, and 193nm immersion with multi-patterning.

read the full article here

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The Sensor Swarm Arrives

By Tom Kevan, Desktop Engineering

Desktop Engineering Logo

It all started with smartphones and airbags. Design engineers began to integrate sensors in growing numbers into such systems to enable smarter performance. These applications mark the prelude to what Alberto Sangiovanni-Vincentelli, a professor at University of California, Berkeley, describes as a “sensory swarm” — a flood of heterogeneous sensors interfacing the cyber and physical worlds. By 2025, experts predict that the swarm could number as many as 7 trillion devices.

One of the first stages in the realization of this sensor-dominated world, the Internet of Things (IoT) requires technologies that can take on smaller form factors and operate on miserly power budgets. In their search to find sensing devices that can meet these requirements, designers have turned to micro-electromechanical systems, or MEMS. Before they can take full advantage of the miniaturization the technology offers and expand its role in the marketplace, engineers must be able to bridge the gaps between the MEMS, analog and digital design worlds. To do this, they will require a new set of tools.

read the full article here

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