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MEMS 2015 – January 18-22, 2015 – Estoril, Portugal

The 28th IEEE International Conference on Micro Electro Mechanical Systems

Coventor will attend MEMS 2015, visit us at booth #16.

ieee28

http://www.mems2015.org/

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Director, Semiconductor Process Integration and Modeling – Silicon Valley, CA

Director, Semiconductor Process Integration and Modeling – Silicon Valley, CA

We are seeking an MS- or PhD-level engineer who has substantial experience and expertise in semiconductor process integration and fabrication, and exceptional communication and presentation skills. You will work in partnership with Coventor’s CTO to promote acceptance and adoption of our unique virtual fabrication solutions at leading semiconductor companies worldwide. You will engage with industry leaders to solve critical manufacturing challenges for advanced technology nodes, including 14nm CMOS and beyond. You must be willing and able to do hands-on engineering with our software in order to provide effective leadership for our field engineers and valuable input to our software development team. Your compensation will be commensurate with your education and experience.

Education: Master’s degree required, PhD degree preferred, in related fields of Electrical Engineering, Chemical Engineering, Materials Science or Applied Physics.

Experience: You must have at least 8 years of work experience in the semiconductor industry with a focus semiconductor processing and integration.

Skills:  Semiconductor Processing, Semiconductor Device Physics (preferred), Computer-Aided Design (CAD) and Modeling, Python scripting language, JMP, Technical Writing, Communication and Presentation.

Location:  This position will ideally have a home base in Silicon Valley, CA, but we will consider other locations for highly qualified candidates. A substantial amount of customer-facing travel and time at customer sites in the US West and Asia is expected.

Coventor offers comprehensive benefits and is an EEO/AA Employer. You must be a current legal resident of the U.S. or have a valid U.S. visa to apply for this position. Please e-mail your cover letter and resume to job1822@coventor.com. Please indicate that this California-based Director position is of most interest to you.

Semiconductor Process Integration and Modeling Engineer – Silicon Valley, CA

Semiconductor Process Integration and Modeling Engineer – Silicon Valley, CA

We are seeking a BS/MS/PhD-level engineer who has experience and expertise in semiconductor process integration and fabrication.  You will work with leading semiconductor companies to implement our virtual fabrication solution for their most advanced development programs, including 14nm CMOS technology and beyond! You will collaborate with Coventor’s CTO and highly skilled software development team to create integration and modeling solutions for industry-critical manufacturing challenges. Our tight-knit team of creative engineers is critical in leading customers into the methodology of virtual fabrication.

This is a hands-on engineering position, requiring proficiency in semiconductor process integration, as well as strong communication and presentation skills.  Your title, level of responsibility, creative freedom and salary will be commensurate with your education and experience.

Education: Bachelor’s degree required, Master’s degree preferred, in related fields of Electrical Engineering, Chemical Engineering, Materials Science or Applied Physics.

Experience: Semiconductor Technology and Processing education and experience is required.  Relevant employment experience in the semiconductor industry (including co-op or internship) is preferred.

Skills:  Semiconductor Processing, Semiconductor Device Physics (preferred), Computer-Aided Design (CAD) and Modeling, Python scripting language, Technical Writing, Communication and Presentation.

Location:  This position will have a home base at our Campbell, CA office, but it is expected that substantial time will be spent at customer sites. Customer-facing travel is expected.

Coventor offers comprehensive benefits and is an EEO/AA Employer. You must be a current legal resident of the U.S. or have a valid U.S. visa to apply for this position. Please e-mail your cover letter and resume to job1822@coventor.com. Please indicate that this California-based position is of most interest to you.

Semiconductor Process Integration and Modeling Engineer – Taiwan

Semiconductor Process Integration and Modeling Engineer – Taiwan

We are seeking a BS/MS/PhD-level engineer who has experience and expertise in semiconductor process integration and fabrication.  You will work with leading semiconductor companies in Taiwan to implement our virtual fabrication solution for their most advanced development programs, including 14nm CMOS technology and beyond! You will collaborate with Coventor’s CTO and highly skilled software development team to create integration and modeling solutions for industry-critical manufacturing challenges. Our tight-knit team of creative engineers is critical in leading customers into the methodology of virtual fabrication.

This is a hands-on engineering position, requiring proficiency in semiconductor process integration, as well as strong communication and presentation skills.  Your title, level of responsibility, creative freedom and salary will be commensurate with your education and experience.

Education: Bachelor’s degree required, Master’s degree preferred, in related fields of Electrical Engineering, Chemical Engineering, Materials Science or Applied Physics.

Experience: Semiconductor Technology and Processing education and experience is required.  Relevant employment experience in the semiconductor industry (including co-op or internship) is preferred.

Skills:  Semiconductor Processing, Semiconductor Device Physics (preferred), Computer-Aided Design (CAD) and Modeling, Python scripting language, Technical Writing, Communication and Presentation.

Location: This position requires residency in Taiwan with a substantial amount of time at customer sites in Taiwan.

Coventor offers comprehensive benefits. Please e-mail your cover letter and resume to job1822@coventor.com. Please indicate that this Taiwan position is of most interest to you.

Semiconductor Process Integration and Modeling Engineer – Japan

Semiconductor Process Integration and Modeling Engineer – Japan

We are seeking a BS/MS/PhD-level engineer who has experience and expertise in semiconductor process integration and fabrication.  You will work with leading semiconductor companies in Japan to implement our virtual fabrication solution for their most advanced development programs, including 14nm CMOS technology and beyond! You will collaborate with Coventor’s CTO and highly skilled software development team to create integration and modeling solutions for industry-critical manufacturing challenges. Our tight-knit team of creative engineers is critical in leading customers into the methodology of virtual fabrication.

This is a hands-on engineering position, requiring proficiency in semiconductor process integration, as well as strong communication and presentation skills.  Your title, level of responsibility, creative freedom and salary will be commensurate with your education and experience.

Education: Bachelor’s degree required, Master’s degree preferred, in related fields of Electrical Engineering, Chemical Engineering, Materials Science or Applied Physics.

Experience: Semiconductor Technology and Processing education and experience is required.  Relevant employment experience in the semiconductor industry (including co-op or internship) is preferred.

Skills:  Semiconductor Processing, Semiconductor Device Physics (preferred), Computer-Aided Design (CAD) and Modeling, Python scripting language, Technical Writing, Communication and Presentation.

Location: This position requires residency in Japan with a substantial amount of time at customer sites in Japan.

Coventor offers comprehensive benefits. Please e-mail your cover letter and resume to job1822@coventor.com. Please indicate that this Japan position is of most interest to you.

Coventor Panel at IEDM Digs into Variation Issues

SemiWiki
by Tom Simon

Coventor Panel at IEDM Digs into Variation Issues
Recently I attended a panel discussion on variability in semiconductor fabrication hosted by Coventor in conjunction with the IEEE IEDM conference in San Francisco. The IEEE bills the conference as “the world’s pre-eminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling.” It’s easy to see how this discussion was relevant to the conference focus. SemiWiki’s own Dan Nenni was the panel moderator.
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