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SEMulator3D Honored as UBM ACE Award Finalist

For Immediate Release
For more information, contact:
Toni Sottak
(408) 876-4418
toni@wiredislandpr.com

SEMulator3D Honored as UBM ACE Award Finalist

Coventor’s Virtual Fabrication Platform Recognized for Significantly Improving Electronics Manufacturing

CARY, NC– November 17, 2017 – Coventor®, Inc. a Lam Research Company and leading supplier of virtual fabrication solutions for semiconductor and micro-electromechanical systems (MEMS) devices, today announced its 3D virtual fabrication platform, SEMulator3D®, has been named a finalist in UBM’s annual ACE Awards competition.

The ACE (Annual Creativity in Electronics) Awards, in partnership with EE Times and EDN, showcase the best of the best in today’s electronics industry, including the hottest new products, start-up companies, design teams, executives, and more. ACE finalists and winners are hand selected by a panel of EE Times and EDN editors as well as independent judges from the across the industry. read more…

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Lam’s Coventor Buy Boosts MEMS Manufacturing

By R. Colin Johnson

SAN JOSE, Calif.—Why did Lam Research, a semiconductor fab equipment supplier, acquire Coventor, a software house hawking software to design microelectromechanical system (MEMS) chips and sub-10 nanometer semiconductors such as 3D finFETs?

Analysts fully expected for Coventor to be absorbed by Lam Research, only to surface as a Lam software offering. But at SEMI’s MEMS & Sensor Executive Congress 2017 (MSEC) here the companies reported that they are staying in separate headquarters, depending more the synergy of co-designing hardware for software and visa versa to give them a competitive edge over the competition.

read the full article here.

半導体プロセス・インテグレーションエンジニア – 日本

半導体プロセス・インテグレーションエンジニア – 日本

半導体プロセスインテグレーションと製造に経験と専門知識を持つBS / MS / PhDレベルのエンジニアを探しています。 大手の半導体企業と協力し、ロジック、DRAM、そして、NANDフラッシュ技術を含む開発プログラムのバーチャル製造ソリューションを実現、提供します。 高度に熟練したソフトウェア研究開発チームと共に、セミコンダクタープロセス・インテグレーションチームと協力して、工程及び製造上の重要な課題を解決するインテグレーションモデリングソリューションを顧客に提供します。

これは実践的なエンジニアリングのポジションであり、半導体プロセスインテグレーションとスクリプトプログラミング(TCLやPython等)、優れたコミュニケーションとプレゼンテーションのスキルを必要とします。

勤務地:日本(神奈川県新横浜、又は、三重県四日市)。 日本の顧客拠点に一定期間の滞在が必要な場合もあります。

必要資格:

教育:電気工学、化学工学、材料科学または応用物理学の関連分野で、学士号必須、修士号または博士号は優遇。

経験:半導体デバイス製造プロセスの開発と構築、半導体デバイスとプロセスのモデリング、その他の半導体産業に関連する雇用の経験が必要です。

スキル:半導体プロセスインテグレーション、半導体デバイスとプロセスのモデリングやシミュレーション(TCAD)、TCLやPython等スクリプト言語、Linux OS環境、テクニカルライティング、実用レベルの英語、コミュニケーションとプレゼンテーション。

 

このポジションに興味があり、日本で働く資格がある場合は、英文のカバーレターと履歴をjob1826@coventor.comに電子メールで送ってください。

Semiconductor Process and Integration Engineer – Japan

Semiconductor Process and Integration Engineer – Japan

We are seeking a BS/MS/PhD-level engineer who has experience and expertise in semiconductor process integration and fabrication. You will work with leading semiconductor companies to implement our virtual fabrication solution for their most advanced development programs, including advanced CMOS, DRAM and 3D NAND Flash technologies. You will collaborate with the Semiconductor Process & Integration team along with our highly skilled software development team, to create integration and modeling solutions for industry-critical manufacturing challenges.

This is a hands-on engineering position, requiring proficiency in full flow semiconductor process integration and script programming (python) as well as strong communication and presentation skills. Your title, level of responsibility, creative freedom and salary will be commensurate with your education and experience.

Location: Japan(Shin-Yokohama or Yokkaichi city). This position requires residency in Japan with a substantial amount of time at customer sites in Japan. Work is expected to be partly based at customer/partner sites. Travel is expected.

Required Qualifications:

Education: Bachelor’s degree required, Master’s degree or Ph-D preferred, in related fields of Electrical Engineering, Chemical Engineering, Materials Science or Applied Physics.

Experience: Semiconductor Technology and Processing education and experience is required. Relevant employment experience in the semiconductor industry is required.

Skills: Semiconductor Processing and Integration, Semiconductor Device Physics (preferred), Computer-Aided Design (CAD) and Modeling, Python scripting language, Technical Writing , Fluency in English and Japanese, Communication and Presentation (spoken and written).

If you are interested in this opportunity and you are authorized to work in Japan, e-mail your cover letter and CV in English to job1865@coventor.com .

Reducing BEOL Parasitic Capacitance using Air Gaps

By: Michael Hargrove, SP&I Engineer

Reducing back-end-of-line (BEOL) interconnect parasitic capacitance remains a focus for advanced technology node development. Porous low-k dielectric materials have been used to achieve reduced capacitance, however, these materials remain fragile and prone to reliability concerns. More recently, air gap has been successfully incorporated into 14nm technology [1], and numerous schemes have been proposed to create the air gap [2-3].  There are many challenges to integrate air gap in BEOL such as process margin for un-landed vias and overall increased process complexity. In this paper, we introduce virtual fabrication (SEMulator3D®) as a means to study air gap process integration optimization and resulting interconnect capacitance reduction. Initial calibration to published air gap data is demonstrated. read more…

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Using Advanced Statistical Analysis to improve FinFET transistor performance

By: Jimmy Gu, SP&I Staff Engineer

Trial and error wafer fabrication is commonly used to study the effect of process changes in the development of FinFET and other advanced semiconductor technologies.  Due to the interaction of upstream unit process parameters (such as deposition conformality, etch anisotropy, selectivity) during actual fabrication, variations based upon process changes can be highly complex. Process simulators that mimic fab unit processes can now be used to model these complex interactions.  They can also help process engineers identify important process and/or design parameters that drive certain critical targets such as CDs, yield limiting spacing, 3D design rule violations, resistance/capacitance, and other process and design issues.   The number of possible parameters that affect device performance and yield can be quite large, so statistical analysis can provide useful insight and help identify critical performance parameters.  Coventor’s SEMulator3D virtual fabrication (or process simulation) platform contains an analytics module for conducting virtual design-of-experiments and statistical analysis. I would like to use an example of a 14nm FinFET process flow in SEMulator3D to identify important process parameters that drive fin top CD, which is a key metric for transistor performance.

read more…

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Lam Research Acquires Simulation and Modeling Solutions Firm Coventor

Lam Research completes acquisition of Coventor

EuroTrade – September 6, 2017

Lam Research, a supplier of wafer fabrication equipment and services to the semiconductor industry, has completed the acquisition of Coventor, a provider of simulation and modeling solutions for semiconductor process technology, micro-electromechanical systems (MEMS), and the Internet of Things (IoT).

Lam said the acquisition supports its advanced process control vision and is expected to accelerate process integration simulation to increase the value of virtual processing, further enabling chipmakers to address some of their most significant technical challenges. read more…

Why Fabs Worry About Tool Parts

By Mark Lapedus

Achieving high yields with acceptable costs is becoming much more difficult as chipmakers migrate to next-generation 3D NAND and finFET devices—but not just because of rising complexity or lithography issues.

To fabricate an advanced logic chip, for example, a wafer moves from one piece of equipment to another in what amounts to 1,000 process steps or more in a fab. Any glitch with the equipment or a process step can cause defects, thereby impacting yield. The culprit may be a malfunction in seemingly insignificant parts or sub-systems in the equipment itself.

read the full article here.