Coventor Blog

The Future of MEMS Sensor Design and Manufacturing

By:  Stephen Breit, VP of Engineering

I recently gave an invited talk at the IEEE Inertial Sensors 2016 symposium that discussed the future of commodity MEMS inertial sensor design and manufacturing. Inertial sensors comprise one of the fastest growing and most successful segments of the MEMS market. read more…

Will directed self-assembly pattern 14nm DRAM?

By: Mattan Kamon, PhD., Distinguished Technologist, R&D, Coventor

Matt's March 2016 Blog Graphic

But first, more generally, will directed self-assembly (DSA) join Extreme Ultraviolet (EUV) Lithography and next generation multi-patterning techniques to pattern the next memory and logic technologies?  Appealing to the wisdom of crowds, the organizers of the 2015 1st International DSA symposium recently surveyed the attendees, and nearly 75% believed DSA would insert into high volume manufacturing within the next 5 years, and nearly 30% predicted insertion within the next 2 years.   What is gating insertion?  The crowd rated defectivity as the most critical issue facing DSA.  This fact adds weight to memory being the first to be patterned with DSA.  This is because, as Roel Gronheid from IMEC pointed out last month at the SPIE Advanced Lithography conference [1], memory chips can tolerate single failing cells through redundancy and so can could tolerate higher defectivity in patterning (roughly 1 defect/cm2 compared to 0.01 defect/cm2 for logic).  Defectivity rates for DSA aren’t there yet (according to public information), but are rapidly approaching [2], [3]. read more…

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Advanced Lithography and Process Variation Modeling Using SEMulator3D


Click on image to view animation of modeling

By:   Jimmy Gu, Coventor Technical Staff

One of the top and probably toughest challenges that process integrators are facing today in a silicon fab is process variability. As a former process integrator working hard to ramp up the yield of 22nm FinFET technology, I saw it first-hand. Looking back, I wish I was equipped with the SEMulator3D virtual fabrication platform, which is designed to address this type of process variability challenge. With the recent release of SEMulator3D 5.1, its process variability toolbox has just received a powerful new addition: the ability to model line edge roughness (LER) and line width roughness (LWR) in lithography. read more…

MEMS+ 6.0 takes on MEMS/IoT integration challenges

 Visualization of 3-axis MEMS gyro, courtesy of Murata Oy, simulated with MEMS+ model in MATLAB

Visualization of 3-axis MEMS gyro, courtesy of Murata Oy, simulated with MEMS+ model in MATLAB

We announced the release of the latest version of our MEMS+ design platform this week, MEMS+ 6.0. This release contains many new features and performance improvements that existing customers will appreciate as well as new capabilities that address key challenges of integrating MEMS with IoT devices. There’s far too much to talk about in one blog, so we will focus this one on why MEMS are critical to IoT and the key MEMS/IoT integration challenges MEMS+ 6.0 addresses. Subsequent blogs will expand on each of these challenges and our solutions. read more…

VP of Business Development Blog

By Dinesh Bettadapur
July 2015

I was recently promoted to the Coventor executive management team as VP of Business Development assuming primary responsibility for driving business strategy and growth across the global semiconductor equipment market while also continuing to focus on driving market share growth across the Western US for the memory & logic IDMs as well as validation of the business potential for the fabless IC market.
read more…

SEMulator3D 5.0 – It’s ALMOST HERE!!!!

By David M. Fried

I said I’d follow up with another blog about new features and capabilities SEMulator3D 5.0… and I’m running out of time. The Gold release is less than a week away!!
In the last blog, I gave a general overview of the new release and I talked about the all new dopant-handling capabilities, so let’s just jump right into another topic…Visibility!
read more…

Collaboration Brings Fast Analysis to Acoustic Resonator Design

By Mattan Kamon

After some lively conversations with the top researchers in MEMS acoustic resonators during the 2014 Sensors and Actuators Workshop (familiarly known to the MEMS community as “Hilton Head”) we were motivated to develop a simulation solution that would better serve these researchers as well as commercial designers. With the recent release of CoventorWare 10, we introduced a new fast analysis capability for acoustic resonators that is unique in the industry and I’m excited to blog about it here.
read more…

Don’t miss new Cloud-Based 3D Design-Technology Checking (3D-DTC) demo at DAC!

DAC 2015 is in full swing in San Francisco this week, and Coventor is there again. But this year, we’re also doing a special joint demonstration with Silicon Cloud International. This demonstration combines the power of Coventor’s SEMulator3D Virtual Fabrication platform with broad parallel computing offered by Silicon Cloud to produce a whole new capability that we call “3D Design-Technology Checking” or 3D-DTC for short (not DRC!).
read more…