By: Christine Dufour, MEMS PDK Program Manager
MEMS-based component suppliers want to rapidly ramp their designs into high-volume production. This demand is driving MEMS suppliers to focus on ways to more efficiently re-use established process steps, stacks or technology platforms. To meet this need, we see the emergence of standard MEMS technology and design platforms similar to those used in CMOS design.
The semiconductor industry and EDA vendors have established integrated design environments based on PDKs (Process Design Kits), standard cell libraries, memory architectures, and IP, to give easy access to the technology for IC designers and increase chances of first-pass successful silicon. Coventor’s vision is that the MEMS eco system and MEMS EDA software vendors should play a similar role in accelerating MEMS product development. read more…
By: Sofiane Guissi, Semiconductor Process & Integration Engineer, Coventor
Over the last decade, CMOS Image Sensor (CIS) technology has made impressive progress. Image sensor performance has dramatically improved over the years, and CIS technology has enjoyed great commercial success since the introduction of mobile phones using on-board cameras. Many people, including scientists and marketing specialists, predicted 15 years earlier that CMOS image sensors were going to completely displace CCD imaging devices, in the same way that CCD devices displaced video capture tubes during the mid-1980’s. Although CMOS has a strong position in imaging today, it has not totally displaced CCD devices. On the other hand, the drive into CMOS technology has drastically increased the overall imaging market. CMOS image sensors have not only created new product applications, but have also boosted the performance of CCD imaging devices as well. In this paper, we describe the state-of-the-art in CMOS image sensor technology and discuss future perspectives.
Tagged 3D Stacked CIS, CCD, CCD process flow, CCD process integration, CCD review, Charged Coupled Device, CIS, CIS process flow, CIS review, CIS Technology/Market/Vendors, CMOS Image Sensor process flow, CMOS image sensor process integration, CMOS Image Sensors, CMOS image sensors review, Process Flow, Process Integration, What is a CCD, What is a Charge Coupled Device, What is a CMOS Sensor, What is an image sensor
By: Mustafa B. Akbulut, Ph.D., Team Lead, Quality Assurance, Semiconductor Solutions
Things were easy for integrators when the pattern they had on the mask ended up being the pattern they wanted on the chip. Multi-patterning schemes such as Self-Aligned Double Patterning (SADP) and Self-Aligned Quadruple Patterning (SAQP) have changed that dramatically. Now, what you have on the mask determines only a part of what you will get at the end. read more…
Tagged BEOL, Coventor, Fin Patterning, multi-patterning, Photolithography, Process Modeling, Process Simulation, Process Variability, SAQP, Self-Aligned Double Patterning, Self-Aligned Quadruple Patterning, Semiconductor Mask, semiconductor process modeling, semiconductor process variation, SEMulator3D, SPIE Advanced Lithography, virtual fabrication
By: Jun Yan, Ph.D., MEMS Technical Director
Source: InfineonTechnologies, AG, “The Infineon Silicon MEMS Microphone”, DOI:10.5162/sensor2013/A4.3
MEMS microphones have emerged as a bright spot among consumer sensors, which in general are going through a rapid commoditization and profit-squeezing trend.
Tagged Apple Computer, Coventor, CoventorWare, FEA, Finite Element Analysis, Goertek, Knowles, MEMS Design Software, mems microphone, MEMS Microphone design, MEMS Microphone Design Software, MEMS Multiphysics, MEMS+, Multiphysics design software, SNR prediction, ST Microelectronics, STMicroelectronics, TSMC
By: Katherine Gambino, Strategic Accounts Manager
Building a chip fabrication facility requires billions of dollars in investment for land, buildings, processing equipment, chemical and hazardous material safety, not to mention the deployment of hundreds of highly experienced process engineering and manufacturing personnel. Bringing up an advanced semiconductor process in any fab, new or established, is a several-hundred-million dollar effort, typically requiring two or more years of experimentation with process equipment and process recipes, led by engineers with years of process integration and chip manufacturing expertise.
By: Shi Hao (Jacky) Huang, PhD, Semiconductor Process & Integration Engineer
Nowadays, novel semiconductor technologies have brought complex process flows to the fab. These process flows are needed to support the manufacturing of advanced 3D semiconductor structures. It can be helpful to model process flows, and their effect on a novel device, prior to physical fabrication.
Tagged Coventor, Finite Element Mesh, Finite Element Modeling, Process Development, Process Modeling, Process Simulation, Process Variability, semiconductor process modeling, semiconductor process variation, SEMulator3D, TCAD, TCAD Interface, TCAD Modeling, TCAD Simulation, Voxel mesh, Voxel-based mesh
By: David Fried, Ph.D., Chief Technology Officer, Semiconductor
Coventor recently assembled an expert panel at IEDM 2016, to discuss changes to BEOL process technology that would be needed to continue dimensional scaling to 7 nm and lower. We asked our panelists questions such as: read more…
Tagged 3D architecture, 5NM, 7 nm, Air Gap technology, BEOL, Coventor, Dielectric, EUV, interconnect, LOW-K DIELECTRICS, nanowires, patterning, Process Integration, RC DELAY, SAQP, Self-Aligned Quadruple Patterning