By Ed Sperling
Rising complexity in developing chips at advanced nodes, and an almost perpetual barrage of new engineering challenges at each new node, are making it more difficult for everyone involved to maintain consistent skill levels across a growing number of interrelated technologies.
The result is that engineers are being forced to specialize, but when they work with other engineers with different specialties they frequently don’t understand where the gaps are. Not everyone is speaking the same language—sometimes literally—and the skills at one process node may be markedly different from another. That allows errors to creep in at every level, increasing the number of re-spins and overall costs, decreasing yield, and stretching out time to market.