Coventor Adds Device Analysis Capabilities to SEMulator3D 7.0

New in SEMulator3D 7.0:  Powerful new process and device simulation capabilities


For Immediate Distribution
For more information, contact:
Toni Sottak
(408) 876-4418,

 Coventor Adds Device Analysis Capabilities to SEMulator3D 7.0

New Features Enable SEMulator3D Version 7.0 to Address Both Process Modeling and Device Analysis for Better Insight into Advanced Semiconductor Technology Development

CARY, NC– February 28, 2018 – February 26, 2018 – Coventor, Inc., a Lam Research Company, the leading supplier of design automation solutions for semiconductor devices and micro-electromechanical systems (MEMS), today announced the availability of SEMulator3D® 7.0 – the newest version of its semiconductor virtual fabrication platform. With added features, performance improvements, and a new Device Analysis capability, SEMulator3D 7.0 addresses both process and device simulation while lowering the barriers to advanced semiconductor technology development.  The new Device Analysis capability enables seamless understanding of how process changes, process variability, and integration schemes directly impact transistor device performance.   read more…

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FD-SOI Adoption Expands

By Ed Sperling

Fully depleted silicon-on-insulator (FD-SOI) is gaining ground across a number of new markets, ranging from IoT to automotive to machine learning, and diverging sharply from its original position as a less costly alternative to finFET-based designs.

For years, FD-SOI has been viewed as an either/or solution targeted at the same markets as bulk CMOS.

read the full article here.

How To Build A Better MEMS Microphone

By: Chris Welham, Senior Manager, MEMS Applications Engineering

A Section of a MEMS Microphone Model


Here at Coventor, we are seeing a lot of interest in simulating noise, particularly for condenser microphones. With any transducer noise reduction is always a plus, and with microphones there are two specific applications that need low noise. One is where the microphone is positioned away from the sound source, such as in video calling or when using voice commands with tablet computers. The other is where multiple microphones are positioned in an array, to detect the direction of incoming sound or for noise canceling applications. read more…

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Comparing MEMS and the RMS Titanic: Some Thoughts from the IEEE MEMS 2018 Conference

By: Chris Welham, Sr. Manager, MEMS Applications Engineering

Conference dinner view of the life-size outlines of the Titanic and Olympic main deck’s, illuminated by blue light

How are MEMS and Large Ships Alike?

MEMS 2018 was held in Belfast, Northern Ireland this year, on the site where the RMS Titanic was built. On exhibit was the SS Nomadic, a tender used to transfer mail and passengers to the RMS Titanic and her sister ship RMS Olympic. Passing by the SS Nomadic on the way to the conference dinner, I noticed the riveted plates from which the tender was built. These riveted plates reminded me of the finite element plate models used in the MEMS+ module of CoventorMP, which can also be joined to other elements using “connectors” or “nodes” rather than rivets. read more…


By Mike Pinelis

In August of 2017, Lam Research completed the acquisition of Coventor, a MEMS modeling and simulation software company, for a total purchase consideration of $137.6 million. When asked about how Coventor fits into Lam’s portfolio, the company’s Executive VP and CFO Douglas Bettinger said that, potentially, there are benefits and synergies with Coventor’s software capability to model and simulate the actual output of Lam’s equipment. We recently spoke with Stephen Breit, Coventor’s Sr. Director of MEMS, and discussed the trends that he is seeing in the MEMS marketplace. Since Coventor works with many MEMS companies, we also asked Stephen about the notable startups and technologies.

read the full article here.

Future Outlook: The Advantages of Fully Depleted Silicon on Insulator (FD-SOI) Technology

By: Michael Hargrove, SP&I Engineer

If my memory serves me well, it was at the 1989 Device Research Conference where the potential merits of SOI (Silicon on Insulator) technology were discussed in a heated evening panel discussion. At that panel discussion, there were many advocates for SOI, as well as many naysayers. I didn’t really think more about SOI technology until the mid-nineties, when I was sitting in a meeting where the first SOI device data was being presented in the hallowed halls of IBM. The data was incredibly scattered and my thinking was “this technology is going nowhere!” The purported performance advantage was stated to be ~35%, simply due to the capacitance reduction (no longer did the bottom junction capacitance play a role) and the speed advantages of stacked devices in a NAND circuit. It all sounded great, but in the mid-nineties, the data simply didn’t support it. Nonetheless, the SOI advocates pursued their beloved technology, and the rest is history. SOI technology has been part of IBM’s main stream high-performance technology base through the 14nm node, including FinFETs on SOI. read more…

What the Experts Think: Delivering the Next 5 Years of Semiconductor Technology

Coventor recently sponsored an expert panel discussion at IEDM 2017 to discuss how we might advance the semiconductor industry into the next generation of technology.  The panel discussed alternative methods to solve fundamental problems of technology scaling, using advances in semiconductor architectures, patterning, metrology, advanced process control, variation reduction, co-optimization and new integration schemes.  Our panel included Rick Gottscho, CTO of Lam Research; Mark Dougherty, vice president of advanced module engineering at GlobalFoundries; David Shortt, technical fellow at KLA-Tencor; Gary Zhang, vice president of computational lithography products at ASML; and Shay Wolfling, CTO of Nova Measuring Instruments.

The Next 5 Years of Semiconductor Technology

L-R: Ed Sperling (moderator), Shay Wolfling, Rick Gottscho, Mark Dougherty, Gary Zhang, David Shortt

read more…

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GPU Computing Software Engineer – Paris, France

GPU Computing Software Engineer – Paris, France

At Coventor, we build innovative software products to solve semiconductor technology challenges. Our 3D modeling software is revolutionizing the way that semiconductor chips are fabricated around the world. Enabled by our core intellectual property – an accelerated 3D voxel modeling and visualization engine – our software is evolving fast as our business and customer base expands rapidly.

We are searching for a talented software engineer with a strong background in GPU computing and rendering to join our development team. Our voxel-based 3D modeling engine creates highly accurate and topologically complex models of nanometer-scale semiconductor devices. Consequently, the accurate real-time visualization of such large structures across a variety of hardware platforms is a major challenge. You will participate in the development of a GPU-based ray-tracing engine for complex voxel models, in the implementation of advanced data visualization techniques, as well as in the implementation of other general-purpose computing algorithms on the GPU.

This is a perfect role for candidates who are interested in GPU computing, ray-tracing, 3D computer graphics as well as software engineering in a commercial environment. You will work closely with our semiconductor process technology team to understand technical requirements of our partners and customers. Your work will enable Coventor and our customers to visualize and inspect the highly complex 3D structures of today’s semiconductor devices in real time.


  • Participate in the development of a GPU-based real-time ray-tracing engine for complex 3D voxel models
  • Implement advanced 3D data visualization algorithms
  • Accelerate voxel model operations, numerical linear algebra functions, or geometry processing algorithms
  • Collaborate with our applications team to understand and troubleshoot customer requests and problems
  • Create high-quality software including unit tests and documentation

Required Qualifications

  • PhD or MS in computer science related to GPU computing, computer graphics, or equivalent experience
  • Expertise in GPU computing, ray-tracing, level-of-detail techniques, handling of large data sets on the GPU
  • In-depth knowledge of one or more GPU computing toolkits such as NVIDIA® CUDA™, OpenCL™, or Vulkan®
  • Strong background in C++ programming and software engineering
  • Strong fundamental math skills
  • Excellent communication skills in English, both written and oral, as well as the ability to clearly communicate technical concepts

Desirable Qualifications

  • Familiarity with multiple GPU computing toolkits on different platforms is a plus
  • Experience with GPU performance profiling and debugging tools
  • Experience with voxel modeling and/or geometry processing algorithms
  • Knowledge of agile methods, object-oriented design, design patterns, and cross-platform development (Windows/Linux)
  • Experience with C++ libraries such as boost, STL, or Qt. Familiarity with C++11 and template programming. Python coding skills.
  • Any professional software development experience is a plus, preferably developing a 3D modeling software product
  • Knowledge of semiconductor process technology, or any software related to semiconductor design or manufacturing

Salary, job title, and responsibilities will be commensurate with experience. This opening is in Villebon-sur-Yvette, close to Paris, or in Dublin, Ireland. If you are interested in this opportunity and you are authorized to work in France or Ireland, e-mail you resume in English to