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  • A Review of Silicon Photonics: Using Process Simulation to Design Silicon Photonics Devices
Coventor-July_2018_blog-Figure5_FDSOI_SG_paper
Everything You Need to Know about FDSOI Technology – Advantages, Disadvantages, and Applications of FDSOI
July 20, 2018
3D NAND Memory Array and Key Process Challenges (Source: Lam Research)
3D NAND: Challenges beyond 96-Layer Memory Arrays
October 12, 2018

A Review of Silicon Photonics: Using Process Simulation to Design Silicon Photonics Devices

Published by Michael Hargrove at August 16, 2018
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  • Coventor Blog
Tags
  • SEMulator3D
  • Silicon Photonics
Coventor-August-2018-Blog-Figure-2-Resulting third party software modeling of Y-splitter optical properties.

With the end of Moore’s Law rapidly approaching, or as some folks say – “already here”, new applications of older technologies are gaining attention. One specific area of interest is photonics. The National Center for Optics and Photonic Education defines photonics as the technology of generating and harnessing light and other forms of radiant energy whose quantum unit is the photon. It can also be defined as the science and application of light. Photonic applications use the photon in the same way that electronic applications use the electron. So, it’s natural to think of photonic applications in a similar manner as we think of electronic applications. The connection back to Moore’s Law is that we want to integrate photonic structures on a typical silicon wafer, utilizing Si-based technology that the industry has been continually shrinking and improving. This aspiration has led to the creation of silicon photonics technology, where photonics structures are built directly onto silicon wafers.

There has been much interest and attention paid to silicon photonics in the past 5 years. In fact, university centers of excellence have been established at RIT and MIT and at many other research centers worldwide. The field of silicon photonics explores the optical properties of materials and their application in telecommunications, laser-based radar, data communications, sensing, and in many other areas. Silicon photonics has the potential to dramatically improve the performance and reliability of electronic integrated circuits while significantly reducing size, weight, and power consumption. As quoted on the AIM Photonics website, “Developing a widely accepted set of processes and protocols for the design, manufacture, and integration of photonics systems will not only advance this technology in the United States, but also present a tremendous economic opportunity, with the overall global market estimated to grow to in excess of $795 billion by 2022. Integrated photonics will enable the advancement of the aforementioned applications, as well as others, in the 21st century in the same manner that semiconductor microchips fostered the revolution in computing over the past 40 years.”

Wafer level process simulation can be used to understand process implications, process variability impacts, and photonic characteristics of integrated photonic devices. Silicon photonics relies heavily on existing silicon-based processing and benefits from accurate simulation and emulation, like any silicon-based device. Virtual fabrication is a form of simulation used for modeling process variability and can be used to model variability in these devices. SEMulator3D® is a virtual fabrication software platform that models step-by-step processes and the impact of process variation and is useful in the design of silicon photonics devices. Along with its process modeling capabilities, SEMulator3D can interface with third party FDTD tools to simulate the optical properties of a modeled structure.

SEMulator3D process flow showing a Y-splitter generic layout, process flow/setup, resulting 3D model, and ultimately the final mesh export.
Figure 1. SEMulator3D process flow showing a Y-splitter generic layout, process flow/setup, resulting 3D model, and ultimately the final mesh export.

Figure 1 demonstrates an example of using SEMulator3D for 3D process modeling of a silicon photonics device. The example highlights the flow of a process build for a Y-splitter, along with meshing and mesh export of the structure. The exported mesh is subsequently imported into a third party FDTD tool, used to model the optical properties of the splitter (see Figure 2).

Resulting third party software modeling of Y-splitter optical properties.
Figure 2. Resulting third party software modeling of Y-splitter optical properties.

A directional coupler was also modeled in SEMulator3D (Figure 3) and sidewall angle variation impact on the optical properties of the device was studied In this virtual experiment, DOE and Monte Carlo analysis was performed using built-in process variation and analytics capabilities of SEMulator3D. The resulting sidewall variation profile is shown in Figure 3. SEMulator3D also has the capability of modeling lithography impacts due to line edge roughness (LER). A complete process impact study of this LER effect is shown in Figure 4. The final step in the LER analysis (not shown) would be to create and export a mesh from SEMulator3D, followed by mesh import into a third party FDTD tool to simulate the optical properties of the device.

Directional coupler modeled in SEMulator3D with resulting sidewall variation.
Figure 3. Directional coupler modeled in SEMulator3D with resulting sidewall variation.
LER impact on Y-splitter. Final step in the process is the mesh export/import into FDTD simulation tool to optimize optical properties.
Figure 4. LER impact on Y-splitter. Final step in the process is the mesh export/import into FDTD simulation tool to optimize optical properties.

With the advent of silicon photonics, the emphasis on device/structure performance and optimization has shifted from controlling electrons to controlling photons. However, the field of silicon photonics is dependent on existing silicon-based technology and manufacturing. The ability to emulate process flows and model complicated optical structures will be critical to the commercial success of the emerging silicon photonics industry.

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Michael Hargrove
Michael Hargrove
Michael Hargrove is a member of the semiconductor process and integration team at Coventor, a Lam Research Company. He has worked in the semiconductor technology development business for more than 30 years. He began his career at IBM, where he worked on advanced CMOS technology development. He then spent five years at Epson Research and Development, working on high-speed/high-frequency device design and characterization. He later joined AMD, where he worked on high-k/metal gate technology. Hargrove subsequently transitioned to GlobalFoundries Research and Development in Albany, NY. At Coventor his focus is 3D semiconductor process modeling. Hargrove received his Ph.D. from the Thayer School of Engineering at Dartmouth College, in Hanover, N.H.

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