Practical Methods to Overcome the Challenges of 3D Logic Design
June 22, 2018
3D NAND: Challenges beyond 96-Layer Memory Arrays
October 12, 2018
This blog is a summary of a technical and business review of FDSOI technology. Read the full paper here.
Over the past decades, transistor feature size has continuously decreased, leading to an increase in performance and a reduction in power consumption. Consumers have reaped the benefits, with superior electronic devices that have become increasingly useful, valuable, faster and more efficient. In recent years, as transistor feature size has shrunk below 10nm, it has become progressively more difficult to meet the many challenges of next generation technology.
Fully Depleted Silicon on Insulator (FDSOI) CMOS Transistors
FDSOI technology offers a promising answer to these challenges. Fully Depleted Silicon on Insulator, or FDSOI, is a planar process technology that delivers the benefits of reduced silicon geometries while simplifying the manufacturing process. This process technology relies on two primary innovations. First, an ultra-thin layer of insulator, called the buried oxide (BOX), is positioned on top of the base silicon. Then, a very thin silicon film is used to form a transistor channel. Due to the thin film silicon structure, there is no need to dope the channel, thus making the transistor “fully depleted.”
Figure 1 (left) shows a fully depleted (FD) 2D SOI wafer. At center is an illustration of an FDSOI transistor structure (source: ST Microelectronics). An actual 28nm FDSOI Transistor is shown on the far right (source: Qing Liu et. al, 2011 VLSI Conference).
FDSOI CMOS Transistor: Key Advantages
FDSOI technology exhibits major benefits for advanced and future technology nodes. Thin silicon film technology allows superior electrostatic control of the gate on the channel of the transistor, compared to conventional architectures (like FinFETs). This control is accomplished by efficient body biasing, which provides faster switching speeds, and provides a good compromise between performance and power consumption at the circuit level.
FDSOI remains a planar technology, which makes it easier to transition from conventional technologies; manufacturability is simplified compared to the manufacture of FinFET devices. The use of thin buried insulator layers in FDSOI offers the ability to dynamically modulate the threshold voltage of the devices and obtain the best compromise between performance and power consumption.
Figure 2 summarizes the main benefits of FDSOI Transistor and technology.
FDSOI APPLICATIONS: Benefits by Market Segment
Automotive is an emerging application area for FDSOI technology, due to its inherent radiation tolerance. IoT products are also expected to be a big market for FDSOI, due to superior RF and analog performance coupled with low power, high performance and relative ease of design. Other application areas including networking infrastructure, machine learning, and consumer multimedia applications.
Summary
In summary, FDSOI technology provides improved speed, reduced power and a simpler manufacturing process compared to bulk silicon technologies. It delivers a good power/performance/cost tradeoff compared to both bulk and FinFET technologies, which has led to adoption in automotive, IoT and other applications. The clear roadmap to improve FDSOI performance provides a path to develop the next generation of high performance, low power semiconductor devices.
If you are interested in learning more about FDSOI technology, you may read the full paper here.
