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The Challenge of Modeling the Interaction between MEMS Inertial Sensors and their Packaging

By: Arnaud Parent

Simulation of Thermal Effects on MEMS Performances

MEMS inertial sensors, such as Accelerometers and Gyroscopes, have been commercially successful in the consumer marketplace, where reduced size and cost are more important than accuracy. These sensors are classified as commercial grade products, even though they are typically used in consumer applications. Today, MEMS inertial sensors are knocking on the door of tactical grade applications, where the requirements for accuracy are much more demanding. MEMS products may one day enter the navigation grade application space, where accuracy demands are even more stringent. To meet the enhanced accuracy and performance requirements of tactical and navigation grade inertial sensors, MEMS designers must not only consider the transducer itself but the interaction of the product with its surrounding environment (starting with the packaging). At Coventor, we have a new simulation platform that can be used to create a compact model of MEMS transducers along with their packaging, providing a method to efficiently study the overall behavior of MEMS inertial sensors. read more…

Improving Patterning Yield at the 5 nm Semiconductor Node

By:  Benjamin Vincent, Ph.D., Staff Engineer, Semiconductor Process & Integration

Engineering decisions are always data-driven.  As scientists, we only believe in facts and not in intuition or feelings.

At the manufacturing stage, the semiconductor industry is eager to provide data and facts to engineers based upon metrics such as the quantity of wafers produced per hour and sites/devices tested on each of those wafers. The massive quantity of data generated in semiconductor manufacturing can provide facts that engineers can use to make immediate and accurate decisions, such as how they might correct any excursion or yield drift. Data exists, so life is (kind of…) easy! read more…

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Coventor Adds Device Analysis Capabilities to SEMulator3D 7.0

New in SEMulator3D 7.0:  Powerful new process and device simulation capabilities

 

For Immediate Distribution
For more information, contact:
Toni Sottak
(408) 876-4418,
toni@wiredislandpr.com

 Coventor Adds Device Analysis Capabilities to SEMulator3D 7.0

New Features Enable SEMulator3D Version 7.0 to Address Both Process Modeling and Device Analysis for Better Insight into Advanced Semiconductor Technology Development

CARY, NC– February 28, 2018 – February 26, 2018 – Coventor, Inc., a Lam Research Company, the leading supplier of design automation solutions for semiconductor devices and micro-electromechanical systems (MEMS), today announced the availability of SEMulator3D® 7.0 – the newest version of its semiconductor virtual fabrication platform. With added features, performance improvements, and a new Device Analysis capability, SEMulator3D 7.0 addresses both process and device simulation while lowering the barriers to advanced semiconductor technology development.  The new Device Analysis capability enables seamless understanding of how process changes, process variability, and integration schemes directly impact transistor device performance.   read more…

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FD-SOI Adoption Expands

By Ed Sperling

Fully depleted silicon-on-insulator (FD-SOI) is gaining ground across a number of new markets, ranging from IoT to automotive to machine learning, and diverging sharply from its original position as a less costly alternative to finFET-based designs.

For years, FD-SOI has been viewed as an either/or solution targeted at the same markets as bulk CMOS.

read the full article here.

How To Build A Better MEMS Microphone

By: Chris Welham, Senior Manager, MEMS Applications Engineering

A Section of a MEMS Microphone Model

Overview

Here at Coventor, we are seeing a lot of interest in simulating noise, particularly for condenser microphones. With any transducer noise reduction is always a plus, and with microphones there are two specific applications that need low noise. One is where the microphone is positioned away from the sound source, such as in video calling or when using voice commands with tablet computers. The other is where multiple microphones are positioned in an array, to detect the direction of incoming sound or for noise canceling applications. read more…

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Comparing MEMS and the RMS Titanic: Some Thoughts from the IEEE MEMS 2018 Conference

By: Chris Welham, Sr. Manager, MEMS Applications Engineering

Conference dinner view of the life-size outlines of the Titanic and Olympic main deck’s, illuminated by blue light

How are MEMS and Large Ships Alike?

MEMS 2018 was held in Belfast, Northern Ireland this year, on the site where the RMS Titanic was built. On exhibit was the SS Nomadic, a tender used to transfer mail and passengers to the RMS Titanic and her sister ship RMS Olympic. Passing by the SS Nomadic on the way to the conference dinner, I noticed the riveted plates from which the tender was built. These riveted plates reminded me of the finite element plate models used in the MEMS+ module of CoventorMP, which can also be joined to other elements using “connectors” or “nodes” rather than rivets. read more…

LAM RESEARCH ACQUIRES MEMS SOFTWARE COMPANY COVENTOR

By Mike Pinelis

In August of 2017, Lam Research completed the acquisition of Coventor, a MEMS modeling and simulation software company, for a total purchase consideration of $137.6 million. When asked about how Coventor fits into Lam’s portfolio, the company’s Executive VP and CFO Douglas Bettinger said that, potentially, there are benefits and synergies with Coventor’s software capability to model and simulate the actual output of Lam’s equipment. We recently spoke with Stephen Breit, Coventor’s Sr. Director of MEMS, and discussed the trends that he is seeing in the MEMS marketplace. Since Coventor works with many MEMS companies, we also asked Stephen about the notable startups and technologies.

read the full article here.

Future Outlook: The Advantages of Fully Depleted Silicon on Insulator (FD-SOI) Technology

By: Michael Hargrove, SP&I Engineer

If my memory serves me well, it was at the 1989 Device Research Conference where the potential merits of SOI (Silicon on Insulator) technology were discussed in a heated evening panel discussion. At that panel discussion, there were many advocates for SOI, as well as many naysayers. I didn’t really think more about SOI technology until the mid-nineties, when I was sitting in a meeting where the first SOI device data was being presented in the hallowed halls of IBM. The data was incredibly scattered and my thinking was “this technology is going nowhere!” The purported performance advantage was stated to be ~35%, simply due to the capacitance reduction (no longer did the bottom junction capacitance play a role) and the speed advantages of stacked devices in a NAND circuit. It all sounded great, but in the mid-nineties, the data simply didn’t support it. Nonetheless, the SOI advocates pursued their beloved technology, and the rest is history. SOI technology has been part of IBM’s main stream high-performance technology base through the 14nm node, including FinFETs on SOI. read more…