Performing High Accuracy Capacitance Analysis using SEMulator3D

Netlist Extraction is an important SEMulator3D^® capability that allows a user to extract parasitic resistance and capacitance for different line and via segments during process modeling. This detailed electrical netlist data can then be used to perform a full circuit analysis in a SPICE model. Resistance and capacitance values generated in SEMulator3D are available for use in netlist studies, including the capacitance matrix for the targeted nets. This short article will focus on a new feature in SEMulator3D,  high accuracy capacitance segmentation.

High Accuracy Capacitance Segmentation

The high accuracy capacitance segmentation feature in SEMulator3D provides the ability to accurately calculate the cross-capacitance values between net segments. This new feature can help engineers identify net segments that have an unacceptable cross-capacitance, and proactively change process steps or device design features to improve those results.

To understand capacitance segmentation, one must understand how capacitance calculations are performed in SEMulator3D. The capacitance solver in SEMulator3D calculates the capacitance matrix for all of the electrical nets in the model.  In SEMulator3D, you can provide a name for each net and layer. Electrical components in the wafer are identified with a net name, and are assigned to specific net names based upon the nets that overlap their respective coordinate locations. Layer names are also used to group specific conductive materials under a distinct name. These layer names can then be used to create internal or external ports, and can also be used to automatically insert internal ports at the interface between specified layers. Prior to the recent product update, capacitance calculations were made across all nets and the capacitance for each net was evenly distributed by dividing it equally between the ports (see Figure 1). This capacitance calculation has now been improved using the new high accuracy capacitance segmentation feature in SEMulator3D.

Figure 1: a) Net segments defined by named layers (b) capacitance calculations showing that capacitance for each net is evenly distributed by dividing it equally between all ports

High Accuracy Capacitance Segmentation Examples

Example 1: Capacitance Segmentation using 2 Nets

Two test examples will now be used to compare the capacitance with and without the new high accuracy capacitance segmentation capabilities. One test deck includes two nets and the other has three nets. The test structure for the two net example has a junction on the left-hand side (see Figure 2). The first net is divided into 6 different ports (P1 – P6), while the second net is divided into 4 ports (P7 – P10) for capacitance calculation purposes. When this test example was simulated, the software did not automatically add internal ports as needed and did not subdivide long lines and vias.

Figure 2: A test structure designed to calculate capacitance using 2 nets. The 2 separate nets have 6 ports (P1-P6) and 4 ports (P7-P10), respectively.

Without the high accuracy capacitance segmentation feature, the capacitance results are mostly equivalent between the net segments, with a value of 3.34e-07 pF (Figure 3a). With the high accuracy capacitance segmentation feature applied (Figure 3b), capacitance differences between the net segments are readily visible.   These identified differences in capacitance can help engineers make design or process changes that will improve the performance of their structure.

Figure 3a: Capacitance results without the high accuracy capacitance segmentation feature enabled (2 Nets)

Figure 3b: Capacitance results with the high accuracy capacitance segmentation feature enabled (2 Nets)

Example 2: Capacitance Segmentation Using 3 Nets

Our second example of capacitance segmentation uses three nets (see Figure 4a & Figure 4b). The first net (far right, Net 1) has three different ports (two external ports and one internal port, P3-P5) while the second net (center, Net 2) has only two external ports (P1 &P2).  The third net (far left, Net 3) has no ports.

Figure 4a: Test structure with three different nets identified as Net 1 (e0), Net 2 (e1) and Net 3 (e2)

Figure 4b: Test structure with three nets and five total ports (p1 through p5)

The netlist extraction step in SEMulator3D automatically added internal ports as needed and subdivided the long lines and vias using a minimum segment length of 10 nm. Without high accuracy capacitance segmentation, C4, C8 and C12 (the e1 to e2 net capacitances) have the same capacitance value of 2.126E-06 pF across the entire net (see Figure 5a).  In addition, the values of C13, C14 and C15 (the e0 to e2 net capacitances) all have the same capacitance value of 1.176e-07 pF.  The remainder of the calculated cross-capacitance values (C1-C3, C5-C7, C9-C11) are also all the same, at a value of 6.44e-07 pF.   With the high accuracy capacitance segmentation feature enabled (see Figure 5b), we can see that e1 to e2 net capacitances (C4, C8 and C12) and the e0 to e2 net capacitances (C13, C14 and C15) all have different values. The rest of the capacitance values are also different as well.   This is a more precise capacitance simulation than that shown in Figure 5a.

Figure 5a: Capacitance results without the high accuracy capacitance segmentation feature enabled (3 Nets)

Figure 5b: Capacitance results with the high accuracy capacitance segmentation feature enabled (3 Nets)

Conclusion

With the new, high accuracy capacitance segmentation feature implemented in SEMulator3D, engineers can better understand capacitance differences at each net segment. The process-predictive and silicon accurate structures used in SEMulator3D more precisely reflect fabricated devices than the idealized geometry used in standalone R/C solvers, leading to more accurate R/C calculations. This will help engineers understand if changes need to be made in the process integration flow or design layout to improve device performance, without the need to perform costly, time-consuming silicon-based testing.

References

1. SEMulator3D documentation: Electrical Analysis
2. SEMulator3D documentation: RC Netlist Extraction – Capacitance