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Time division multiplex (TDM) plasma etch processes (commonly referred to as Deep Reactive ION Etching (“DRIE”)) use alternating deposition and etch steps cyclically to produce high aspect ratio structures on a silicon substrate. These etch processes have been widely applied in the manufacturing of silicon MEMS devices, and more recently in creating through silicon vias in 3D silicon structures for chip to chip interconnects. Precise control of the etch rate is extremely important in meeting the design characteristics of silicon devices produced using TDM plasma etch.
Virtual fabrication is a computerized technique to perform predictive, three dimensional modeling of semiconductor fabrication processes. Virtual fabrication allows engineers to test semiconductor process changes and process variability in minutes or hours, instead of the weeks or months required to test their designs using actual semiconductor wafers. SEMulator3D is a virtual fabrication solution that can model process variability under complex patterning schemes and process flows.
In this study, SEMulator3D was used to model the etch rate of silicon devices using TDM (or DRIE) etching processes. Predicted results are compared to actual published data, to determine if virtual fabrication can be used to minimize aspect ratio dependent etch variability
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