Figure 2: (a) Layout design, (b) Top view of a typical metal line generated, (c) cross sectional view of the metal line, (d) LER status of RMS and Correlation length split.
A Study of the Impact of Line Edge Roughness on Metal Line Resistance using Virtual Fabrication
August 18, 2022

Whitepaper: Pathfinding by process window modeling: Advanced DRAM capacitor patterning process window evaluation using virtual fabrication

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In advanced DRAM, capacitors with closely packed patterning are designed to increase cell density. Thus, advanced patterning schemes, such as multiple litho-etch, SADP and SAQP processes may be needed. In this paper, we systematically evaluate a DRAM capacitor hole formation process that includes SADP and SAQP patterning, using virtual fabrication and statistical analysis in SEMulator3D®. The purpose of this analysis is to obtain a quantified process window comparison between the SADP and SAQP patterning schemes.

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