FinFET Archives | Coventor

Influence of SiGe on Parasitic Parameters in PMOS
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Influence of SiGe on Parasitic Parameters in PMOS
Self-aligned Fin Cut Last Patterning Scheme for Fin Arrays of 24nm Pitch and Beyond
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Self-aligned Fin Cut Last Patterning Scheme for Fin Arrays of 24nm Pitch and Beyond
N7 FinFET Self-Aligned Quadruple Patterning Modeling
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N7 FinFET Self-Aligned Quadruple Patterning Modeling
Understanding the Effect of Variability in Bulk FinFET Device Performance
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Understanding the Effect of Variability in Bulk FinFET Device Performance
Understanding how small variations in photoresist shape significantly impact multi-patterning yield
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Understanding how small variations in photoresist shape significantly impact multi-patterning yield
Modeling of Cross Wafer Induced Process Variations
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Modeling of Cross Wafer Induced Process Variations
FinFET Front End of Line FEOL Process Integration
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FinFET Front End of Line FEOL Process Integration