September 14, 2021
Fig. 3: Leakage current distribution from different directions.

Evaluating the Impact of STI Recess Profile Control on Advanced FinFET Device Performance Using Virtual Fabrication

Profile variation is one of the most important problems during semiconductor device manufacturing and scaling.  These variations can degrade both chip yield and device performance.   Virtual fabrication can be used […]
July 31, 2019
Top view of slit and channel hole at different nodes

Advanced Patterning Techniques for 3D NAND Devices

Driven by Moore’s law, memory and logic semiconductor manufacturers pursue higher transistor density to improve product cost and performance [1]. In NAND Flash technologies, this has led to the market […]
April 13, 2018
Example of metal connections in Back End of Line (BEOL) development, and highlighted hotspots.

Advanced 3D Design Technology Co-Optimization for Manufacturability

Yield and cost have always been critical factors for both manufacturers and designers of semiconductor products. It is a continuous challenge to meet targets of both yield and cost, due […]
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